diff options
author | Hanoh Haim <hhaim@cisco.com> | 2016-02-16 16:08:23 +0200 |
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committer | Hanoh Haim <hhaim@cisco.com> | 2016-02-16 16:08:23 +0200 |
commit | 47c865838678444c0075aab94267972a3a3cbfff (patch) | |
tree | 3551714c2b6e2f3c71374754732ab0e01c7d83f1 /scripts/automation | |
parent | 75c84998813a359cb8619e80507e04f21d71de89 (diff) |
step instruction support
Diffstat (limited to 'scripts/automation')
-rw-r--r-- | scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py | 4 | ||||
-rw-r--r-- | scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py | 9 |
2 files changed, 8 insertions, 5 deletions
diff --git a/scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py b/scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py index f4b67f05..1f07b6e4 100644 --- a/scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py +++ b/scripts/automation/regression/unit_tests/functional_tests/stl_basic_tests.py @@ -139,7 +139,7 @@ class CStlBasic_Test(functional_general_test.CGeneralFunctional_Test): def test_stl_profiles (self): - p = [ + p1 = [ ["udp_1pkt_1mac_override.py","-m 1 -l 50",True], ["syn_attack.py","-m 1 -l 50",False], # can't compare random now ["udp_1pkt_1mac.py","-m 1 -l 50",True], @@ -180,7 +180,7 @@ class CStlBasic_Test(functional_general_test.CGeneralFunctional_Test): ]; - p1 = [ ["burst_3st_loop_x_times.py","-m 1 -l 20 ",True] ] + p = [ ["udp_1pkt_mac_step.py","-m 1 -l 20 ",True] ] for obj in p: diff --git a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py index 88efe265..c788e277 100644 --- a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py +++ b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py @@ -207,7 +207,7 @@ class CTRexVmInsFlowVar(CTRexVmInsBase): OPERATIONS =['inc', 'dec', 'random'] VALID_SIZES =[1, 2, 4, 8] - def __init__(self, fv_name, size, op, init_value, min_value, max_value): + def __init__(self, fv_name, size, op, init_value, min_value, max_value,step): super(CTRexVmInsFlowVar, self).__init__("flow_var") self.name = fv_name; assert type(fv_name)==str, 'type of fv_name is not str' @@ -219,6 +219,8 @@ class CTRexVmInsFlowVar(CTRexVmInsBase): assert type(min_value)==int, 'type of min_value is not int' self.max_value=max_value assert type(max_value)==int, 'type of min_value is not int' + self.step=step + assert type(step)==int, 'type of step should be int' class CTRexVmInsWrFlowVar(CTRexVmInsBase): def __init__(self, fv_name, pkt_offset, add_value=0, is_big_endian=True): @@ -496,7 +498,7 @@ def check_for_int (val): class CTRexVmDescFlowVar(CTRexVmDescBase): - def __init__(self, name, init_value=None, min_value=0, max_value=255, size=4, op="inc"): + def __init__(self, name, init_value=None, min_value=0, max_value=255, size=4, step=1,op="inc"): super(CTRexVmDescFlowVar, self).__init__() self.name = name; assert type(name)==str, 'type of name is not str' @@ -512,12 +514,13 @@ class CTRexVmDescFlowVar(CTRexVmDescBase): self.init_value = convert_val (init_value) self.min_value = convert_val (min_value); self.max_value = convert_val (max_value) + self.step = convert_val (step) if self.min_value > self.max_value : raise CTRexPacketBuildException(-11,("max %d is lower than min %d ") % (self.max_value,self.min_value) ); def get_obj (self): - return CTRexVmInsFlowVar(self.name,self.size,self.op,self.init_value,self.min_value,self.max_value); + return CTRexVmInsFlowVar(self.name,self.size,self.op,self.init_value,self.min_value,self.max_value,self.step); def get_var_name(self): return [self.name] |