diff options
| author |   imarom <imarom@cisco.com> | 2016-09-26 15:10:39 +0300 |
|---|---|---|
| committer | imarom <imarom@cisco.com> | 2016-09-26 15:10:39 +0300 |
| commit | e3c6ee9f99d5df4f1eae50f694efc609ea3c91ac (patch) | |
| tree | e08999becde339e27b6fbbde821a52f7b3663d21 /scripts/stl | |
| parent | f6d11f9e01e39fe2688558c7598f22ce9feb35da (diff) | |
regression failure: VM with dec might not be able to pad the instruction to true cycle implictly
Diffstat (limited to 'scripts/stl')
| -rw-r--r-- | scripts/stl/udp_1pkt_1mac_step.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/scripts/stl/udp_1pkt_1mac_step.py b/scripts/stl/udp_1pkt_1mac_step.py index 69a84d67..9ed9e50f 100644 --- a/scripts/stl/udp_1pkt_1mac_step.py +++ b/scripts/stl/udp_1pkt_1mac_step.py @@ -14,7 +14,7 @@ class STLS1(object): base_pkt = Ether()/IP(src="16.0.0.1",dst="48.0.0.1")/UDP(dport=12,sport=1025) pad = max(0, size - len(base_pkt)) * 'x' - vm = STLScVmRaw( [ STLVmFlowVar(name="mac_src", min_value=1, max_value=30, size=1, op="dec",step=7), + vm = STLScVmRaw( [ STLVmFlowVar(name="mac_src", min_value=1, max_value=35, size=1, op="dec",step=7), STLVmWrFlowVar(fv_name="mac_src", pkt_offset= 11) # write it to LSB of SRC offset it 11 ] ) |