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authorimarom <imarom@cisco.com>2016-08-10 17:45:36 +0300
committerimarom <imarom@cisco.com>2016-08-15 16:03:59 +0300
commitba7b5dff853a3b11b0cc2e7b29cfc1cd99e606f7 (patch)
tree25a2d72756217ef5d364a4c9b5a6e5e9a9d165a7 /src/bp_sim.h
parentce1de344579505665b88c2d548ca8d2acc135988 (diff)
core mask - first phase
Diffstat (limited to 'src/bp_sim.h')
-rwxr-xr-xsrc/bp_sim.h39
1 files changed, 39 insertions, 0 deletions
diff --git a/src/bp_sim.h b/src/bp_sim.h
index bfdd90f6..e1852da4 100755
--- a/src/bp_sim.h
+++ b/src/bp_sim.h
@@ -3835,6 +3835,45 @@ public:
m_stateless_dp_info.stop_traffic(port_id, false, 0);
}
+ /**
+ * return true if a core currently has some pending CP
+ * messages
+ */
+ bool are_any_pending_cp_messages() {
+ if (get_is_stateless()) {
+ return m_stateless_dp_info.are_any_pending_cp_messages();
+ } else {
+ /* for stateful this is always false */
+ return false;
+ }
+ }
+
+ /**
+ * a core provides services for two interfaces
+ * it can either be idle, active for one port
+ * or active for both
+ */
+ bool is_port_active(uint8_t port_id) {
+ /* for stateful (batch) core is always active,
+ for stateless relay the query to the next level
+ */
+ if (get_is_stateless()) {
+ return m_stateless_dp_info.is_port_active(port_id);
+ } else {
+ return true;
+ }
+ }
+
+
+ /**
+ * returns the two ports associated with this core
+ *
+ */
+ void get_port_ids(uint8_t &p1, uint8_t &p2) {
+ p1 = 2 * getDualPortId();
+ p2 = p1 + 1;
+ }
+
void Dump(FILE *fd);
void DumpCsv(FILE *fd);
void DumpStats(FILE *fd);