mlx5 from dpdk16_11

Signed-off-by: Hanoh Haim <hhaim@cisco.com>

1 files changed, 523 insertions, 8 deletions

diff --git a/src/dpdk/drivers/net/mlx5/mlx5.c b/src/dpdk/drivers/net/mlx5/mlx5.c
index 303b917b..7fc6ccf5 100644
--- a/src/dpdk/drivers/net/mlx5/mlx5.c
+++ b/src/dpdk/drivers/net/mlx5/mlx5.c
@@ -43,16 +43,16 @@
 /* Verbs header. */
 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
 #ifdef PEDANTIC
-#pragma GCC diagnostic ignored "-pedantic"
+#pragma GCC diagnostic ignored "-Wpedantic"
 #endif
 #include <infiniband/verbs.h>
 #ifdef PEDANTIC
-#pragma GCC diagnostic error "-pedantic"
+#pragma GCC diagnostic error "-Wpedantic"
 #endif
 
 /* DPDK headers don't like -pedantic. */
 #ifdef PEDANTIC
-#pragma GCC diagnostic ignored "-pedantic"
+#pragma GCC diagnostic ignored "-Wpedantic"
 #endif
 #include <rte_malloc.h>
 #include <rte_ethdev.h>
@@ -60,7 +60,7 @@
 #include <rte_common.h>
 #include <rte_kvargs.h>
 #ifdef PEDANTIC
-#pragma GCC diagnostic error "-pedantic"
+#pragma GCC diagnostic error "-Wpedantic"
 #endif
 
 #include "mlx5.h"
@@ -181,9 +181,6 @@ mlx5_dev_close(struct rte_eth_dev *dev)
 	}
 	if (priv->reta_idx != NULL)
 		rte_free(priv->reta_idx);
-
-    mlx5_stats_free(dev);
-
 	priv_unlock(priv);
 	memset(priv, 0, sizeof(*priv));
 }
@@ -257,6 +254,7 @@ mlx5_dev_idx(struct rte_pci_addr *pci_addr)
 	return ret;
 }
 
+
 /**
  * Verify and store value for device argument.
  *
@@ -297,6 +295,8 @@ mlx5_args_check(const char *key, const char *val, void *opaque)
 	return 0;
 }
 
+
+
 /**
  * Parse device parameters.
  *
@@ -341,6 +341,8 @@ mlx5_args(struct priv *priv, struct rte_devargs *devargs)
 	return 0;
 }
 
+
+
 static struct eth_driver mlx5_driver;
 
 /**
@@ -527,7 +529,7 @@ mlx5_pci_devinit(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
 
 		/* TREX PATCH */
 		/* set for maximum performance default */
-		priv->txq_inline  =128;
+		priv->txq_inline  =64;
 		priv->txqs_inline =4;
 
 
@@ -781,3 +783,516 @@ static struct rte_driver rte_mlx5_driver = {
 
 PMD_REGISTER_DRIVER(rte_mlx5_driver, mlx5);
 DRIVER_REGISTER_PCI_TABLE(mlx5, mlx5_pci_id_map);
+
+
+
+
+
+
+#if 0
+/**
+ * Verify and store value for device argument.
+ *
+ * @param[in] key
+ *   Key argument to verify.
+ * @param[in] val
+ *   Value associated with key.
+ * @param opaque
+ *   User data.
+ *
+ * @return
+ *   0 on success, negative errno value on failure.
+ */
+static int
+mlx5_args_check(const char *key, const char *val, void *opaque)
+{
+	struct priv *priv = opaque;
+	unsigned long tmp;
+
+	errno = 0;
+	tmp = strtoul(val, NULL, 0);
+	if (errno) {
+		WARN("%s: \"%s\" is not a valid integer", key, val);
+		return errno;
+	}
+	if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
+		priv->cqe_comp = !!tmp;
+	} else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
+		priv->txq_inline = tmp;
+	} else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
+		priv->txqs_inline = tmp;
+	} else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
+		priv->mps = !!tmp;
+	} else {
+		WARN("%s: unknown parameter", key);
+		return -EINVAL;
+	}
+	return 0;
+}
+
+/**
+ * Parse device parameters.
+ *
+ * @param priv
+ *   Pointer to private structure.
+ * @param devargs
+ *   Device arguments structure.
+ *
+ * @return
+ *   0 on success, errno value on failure.
+ */
+static int
+mlx5_args(struct priv *priv, struct rte_devargs *devargs)
+{
+	const char **params = (const char *[]){
+		MLX5_RXQ_CQE_COMP_EN,
+		MLX5_TXQ_INLINE,
+		MLX5_TXQS_MIN_INLINE,
+		MLX5_TXQ_MPW_EN,
+		NULL,
+	};
+	struct rte_kvargs *kvlist;
+	int ret = 0;
+	int i;
+
+	if (devargs == NULL)
+		return 0;
+	/* Following UGLY cast is done to pass checkpatch. */
+	kvlist = rte_kvargs_parse(devargs->args, params);
+	if (kvlist == NULL)
+		return 0;
+	/* Process parameters. */
+	for (i = 0; (params[i] != NULL); ++i) {
+		if (rte_kvargs_count(kvlist, params[i])) {
+			ret = rte_kvargs_process(kvlist, params[i],
+						 mlx5_args_check, priv);
+			if (ret != 0)
+				return ret;
+		}
+	}
+	rte_kvargs_free(kvlist);
+	return 0;
+}
+
+static struct eth_driver mlx5_driver;
+
+/**
+ * DPDK callback to register a PCI device.
+ *
+ * This function creates an Ethernet device for each port of a given
+ * PCI device.
+ *
+ * @param[in] pci_drv
+ *   PCI driver structure (mlx5_driver).
+ * @param[in] pci_dev
+ *   PCI device information.
+ *
+ * @return
+ *   0 on success, negative errno value on failure.
+ */
+static int
+mlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
+{
+	struct ibv_device **list;
+	struct ibv_device *ibv_dev;
+	int err = 0;
+	struct ibv_context *attr_ctx = NULL;
+	struct ibv_device_attr device_attr;
+	unsigned int sriov;
+	unsigned int mps;
+	int idx;
+	int i;
+
+	(void)pci_drv;
+	assert(pci_drv == &mlx5_driver.pci_drv);
+	/* Get mlx5_dev[] index. */
+	idx = mlx5_dev_idx(&pci_dev->addr);
+	if (idx == -1) {
+		ERROR("this driver cannot support any more adapters");
+		return -ENOMEM;
+	}
+	DEBUG("using driver device index %d", idx);
+
+	/* Save PCI address. */
+	mlx5_dev[idx].pci_addr = pci_dev->addr;
+	list = ibv_get_device_list(&i);
+	if (list == NULL) {
+		assert(errno);
+		if (errno == ENOSYS) {
+			WARN("cannot list devices, is ib_uverbs loaded?");
+			return 0;
+		}
+		return -errno;
+	}
+	assert(i >= 0);
+	/*
+	 * For each listed device, check related sysfs entry against
+	 * the provided PCI ID.
+	 */
+	while (i != 0) {
+		struct rte_pci_addr pci_addr;
+
+		--i;
+		DEBUG("checking device \"%s\"", list[i]->name);
+		if (mlx5_ibv_device_to_pci_addr(list[i], &pci_addr))
+			continue;
+		if ((pci_dev->addr.domain != pci_addr.domain) ||
+		    (pci_dev->addr.bus != pci_addr.bus) ||
+		    (pci_dev->addr.devid != pci_addr.devid) ||
+		    (pci_dev->addr.function != pci_addr.function))
+			continue;
+		sriov = ((pci_dev->id.device_id ==
+		       PCI_DEVICE_ID_MELLANOX_CONNECTX4VF) ||
+		      (pci_dev->id.device_id ==
+		       PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF));
+		/* Multi-packet send is only supported by ConnectX-4 Lx PF. */
+		mps = (pci_dev->id.device_id ==
+		       PCI_DEVICE_ID_MELLANOX_CONNECTX4LX);
+		INFO("PCI information matches, using device \"%s\""
+		     " (SR-IOV: %s, MPS: %s)",
+		     list[i]->name,
+		     sriov ? "true" : "false",
+		     mps ? "true" : "false");
+		attr_ctx = ibv_open_device(list[i]);
+		err = errno;
+		break;
+	}
+	if (attr_ctx == NULL) {
+		ibv_free_device_list(list);
+		switch (err) {
+		case 0:
+			WARN("cannot access device, is mlx5_ib loaded?");
+			return 0;
+		case EINVAL:
+			WARN("cannot use device, are drivers up to date?");
+			return 0;
+		}
+		assert(err > 0);
+		return -err;
+	}
+	ibv_dev = list[i];
+
+	DEBUG("device opened");
+	if (ibv_query_device(attr_ctx, &device_attr))
+		goto error;
+	INFO("%u port(s) detected", device_attr.phys_port_cnt);
+
+	for (i = 0; i < device_attr.phys_port_cnt; i++) {
+		uint32_t port = i + 1; /* ports are indexed from one */
+		uint32_t test = (1 << i);
+		struct ibv_context *ctx = NULL;
+		struct ibv_port_attr port_attr;
+		struct ibv_pd *pd = NULL;
+		struct priv *priv = NULL;
+		struct rte_eth_dev *eth_dev;
+		struct ibv_exp_device_attr exp_device_attr;
+		struct ether_addr mac;
+		uint16_t num_vfs = 0;
+
+		exp_device_attr.comp_mask =
+			IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS |
+			IBV_EXP_DEVICE_ATTR_RX_HASH |
+			IBV_EXP_DEVICE_ATTR_VLAN_OFFLOADS |
+			IBV_EXP_DEVICE_ATTR_RX_PAD_END_ALIGN |
+			0;
+
+		DEBUG("using port %u (%08" PRIx32 ")", port, test);
+
+		ctx = ibv_open_device(ibv_dev);
+		if (ctx == NULL)
+			goto port_error;
+
+		/* Check port status. */
+		err = ibv_query_port(ctx, port, &port_attr);
+		if (err) {
+			ERROR("port query failed: %s", strerror(err));
+			goto port_error;
+		}
+
+		if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
+			ERROR("port %d is not configured in Ethernet mode",
+			      port);
+			goto port_error;
+		}
+
+		if (port_attr.state != IBV_PORT_ACTIVE)
+			DEBUG("port %d is not active: \"%s\" (%d)",
+			      port, ibv_port_state_str(port_attr.state),
+			      port_attr.state);
+
+		/* Allocate protection domain. */
+		pd = ibv_alloc_pd(ctx);
+		if (pd == NULL) {
+			ERROR("PD allocation failure");
+			err = ENOMEM;
+			goto port_error;
+		}
+
+		mlx5_dev[idx].ports |= test;
+
+		/* from rte_ethdev.c */
+		priv = rte_zmalloc("ethdev private structure",
+				   sizeof(*priv),
+				   RTE_CACHE_LINE_SIZE);
+		if (priv == NULL) {
+			ERROR("priv allocation failure");
+			err = ENOMEM;
+			goto port_error;
+		}
+
+		priv->ctx = ctx;
+		priv->device_attr = device_attr;
+		priv->port = port;
+		priv->pd = pd;
+		priv->mtu = ETHER_MTU;
+		priv->mps = mps; /* Enable MPW by default if supported. */
+		priv->cqe_comp = 1; /* Enable compression by default. */
+		err = mlx5_args(priv, pci_dev->device.devargs);
+		if (err) {
+			ERROR("failed to process device arguments: %s",
+			      strerror(err));
+			goto port_error;
+		}
+		if (ibv_exp_query_device(ctx, &exp_device_attr)) {
+			ERROR("ibv_exp_query_device() failed");
+			goto port_error;
+		}
+
+		priv->hw_csum =
+			((exp_device_attr.exp_device_cap_flags &
+			  IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
+			 (exp_device_attr.exp_device_cap_flags &
+			  IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
+		DEBUG("checksum offloading is %ssupported",
+		      (priv->hw_csum ? "" : "not "));
+
+		priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
+					 IBV_EXP_DEVICE_VXLAN_SUPPORT);
+		DEBUG("L2 tunnel checksum offloads are %ssupported",
+		      (priv->hw_csum_l2tun ? "" : "not "));
+
+		priv->ind_table_max_size = exp_device_attr.rx_hash_caps.max_rwq_indirection_table_size;
+		/* Remove this check once DPDK supports larger/variable
+		 * indirection tables. */
+		if (priv->ind_table_max_size > (unsigned int)RSS_INDIRECTION_TABLE_SIZE)
+			priv->ind_table_max_size = RSS_INDIRECTION_TABLE_SIZE;
+		DEBUG("maximum RX indirection table size is %u",
+		      priv->ind_table_max_size);
+		priv->hw_vlan_strip = !!(exp_device_attr.wq_vlan_offloads_cap &
+					 IBV_EXP_RECEIVE_WQ_CVLAN_STRIP);
+		DEBUG("VLAN stripping is %ssupported",
+		      (priv->hw_vlan_strip ? "" : "not "));
+
+		priv->hw_fcs_strip = !!(exp_device_attr.exp_device_cap_flags &
+					IBV_EXP_DEVICE_SCATTER_FCS);
+		DEBUG("FCS stripping configuration is %ssupported",
+		      (priv->hw_fcs_strip ? "" : "not "));
+
+		priv->hw_padding = !!exp_device_attr.rx_pad_end_addr_align;
+		DEBUG("hardware RX end alignment padding is %ssupported",
+		      (priv->hw_padding ? "" : "not "));
+
+		priv_get_num_vfs(priv, &num_vfs);
+		priv->sriov = (num_vfs || sriov);
+		if (priv->mps && !mps) {
+			ERROR("multi-packet send not supported on this device"
+			      " (" MLX5_TXQ_MPW_EN ")");
+			err = ENOTSUP;
+			goto port_error;
+		}
+		/* Allocate and register default RSS hash keys. */
+		priv->rss_conf = rte_calloc(__func__, hash_rxq_init_n,
+					    sizeof((*priv->rss_conf)[0]), 0);
+		if (priv->rss_conf == NULL) {
+			err = ENOMEM;
+			goto port_error;
+		}
+		err = rss_hash_rss_conf_new_key(priv,
+						rss_hash_default_key,
+						rss_hash_default_key_len,
+						ETH_RSS_PROTO_MASK);
+		if (err)
+			goto port_error;
+		/* Configure the first MAC address by default. */
+		if (priv_get_mac(priv, &mac.addr_bytes)) {
+			ERROR("cannot get MAC address, is mlx5_en loaded?"
+			      " (errno: %s)", strerror(errno));
+			goto port_error;
+		}
+		INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
+		     priv->port,
+		     mac.addr_bytes[0], mac.addr_bytes[1],
+		     mac.addr_bytes[2], mac.addr_bytes[3],
+		     mac.addr_bytes[4], mac.addr_bytes[5]);
+		/* Register MAC address. */
+		claim_zero(priv_mac_addr_add(priv, 0,
+					     (const uint8_t (*)[ETHER_ADDR_LEN])
+					     mac.addr_bytes));
+		/* Initialize FD filters list. */
+		err = fdir_init_filters_list(priv);
+		if (err)
+			goto port_error;
+#ifndef NDEBUG
+		{
+			char ifname[IF_NAMESIZE];
+
+			if (priv_get_ifname(priv, &ifname) == 0)
+				DEBUG("port %u ifname is \"%s\"",
+				      priv->port, ifname);
+			else
+				DEBUG("port %u ifname is unknown", priv->port);
+		}
+#endif
+		/* Get actual MTU if possible. */
+		priv_get_mtu(priv, &priv->mtu);
+		DEBUG("port %u MTU is %u", priv->port, priv->mtu);
+
+		/* from rte_ethdev.c */
+		{
+			char name[RTE_ETH_NAME_MAX_LEN];
+
+			snprintf(name, sizeof(name), "%s port %u",
+				 ibv_get_device_name(ibv_dev), port);
+			eth_dev = rte_eth_dev_allocate(name);
+		}
+		if (eth_dev == NULL) {
+			ERROR("can not allocate rte ethdev");
+			err = ENOMEM;
+			goto port_error;
+		}
+
+		/* Secondary processes have to use local storage for their
+		 * private data as well as a copy of eth_dev->data, but this
+		 * pointer must not be modified before burst functions are
+		 * actually called. */
+		if (mlx5_is_secondary()) {
+			struct mlx5_secondary_data *sd =
+				&mlx5_secondary_data[eth_dev->data->port_id];
+			sd->primary_priv = eth_dev->data->dev_private;
+			if (sd->primary_priv == NULL) {
+				ERROR("no private data for port %u",
+						eth_dev->data->port_id);
+				err = EINVAL;
+				goto port_error;
+			}
+			sd->shared_dev_data = eth_dev->data;
+			rte_spinlock_init(&sd->lock);
+			memcpy(sd->data.name, sd->shared_dev_data->name,
+				   sizeof(sd->data.name));
+			sd->data.dev_private = priv;
+			sd->data.rx_mbuf_alloc_failed = 0;
+			sd->data.mtu = ETHER_MTU;
+			sd->data.port_id = sd->shared_dev_data->port_id;
+			sd->data.mac_addrs = priv->mac;
+			eth_dev->tx_pkt_burst = mlx5_tx_burst_secondary_setup;
+			eth_dev->rx_pkt_burst = mlx5_rx_burst_secondary_setup;
+		} else {
+			eth_dev->data->dev_private = priv;
+			eth_dev->data->rx_mbuf_alloc_failed = 0;
+			eth_dev->data->mtu = ETHER_MTU;
+			eth_dev->data->mac_addrs = priv->mac;
+		}
+
+		eth_dev->pci_dev = pci_dev;
+		rte_eth_copy_pci_info(eth_dev, pci_dev);
+		eth_dev->driver = &mlx5_driver;
+		priv->dev = eth_dev;
+		eth_dev->dev_ops = &mlx5_dev_ops;
+
+		TAILQ_INIT(&eth_dev->link_intr_cbs);
+
+		/* Bring Ethernet device up. */
+		DEBUG("forcing Ethernet interface up");
+		priv_set_flags(priv, ~IFF_UP, IFF_UP);
+		mlx5_link_update_unlocked(priv->dev, 1);
+		continue;
+
+port_error:
+		if (priv) {
+			rte_free(priv->rss_conf);
+			rte_free(priv);
+		}
+		if (pd)
+			claim_zero(ibv_dealloc_pd(pd));
+		if (ctx)
+			claim_zero(ibv_close_device(ctx));
+		break;
+	}
+
+	/*
+	 * XXX if something went wrong in the loop above, there is a resource
+	 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
+	 * long as the dpdk does not provide a way to deallocate a ethdev and a
+	 * way to enumerate the registered ethdevs to free the previous ones.
+	 */
+
+	/* no port found, complain */
+	if (!mlx5_dev[idx].ports) {
+		err = ENODEV;
+		goto error;
+	}
+
+error:
+	if (attr_ctx)
+		claim_zero(ibv_close_device(attr_ctx));
+	if (list)
+		ibv_free_device_list(list);
+	assert(err >= 0);
+	return -err;
+}
+
+static const struct rte_pci_id mlx5_pci_id_map[] = {
+	{
+		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
+			       PCI_DEVICE_ID_MELLANOX_CONNECTX4)
+	},
+	{
+		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
+			       PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
+	},
+	{
+		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
+			       PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
+	},
+	{
+		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
+			       PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
+	},
+	{
+		.vendor_id = 0
+	}
+};
+
+static struct eth_driver mlx5_driver = {
+	.pci_drv = {
+		.driver = {
+			.name = MLX5_DRIVER_NAME
+		},
+		.id_table = mlx5_pci_id_map,
+		.probe = mlx5_pci_probe,
+		.drv_flags = RTE_PCI_DRV_INTR_LSC,
+	},
+	.dev_private_size = sizeof(struct priv)
+};
+
+/**
+ * Driver initialization routine.
+ */
+RTE_INIT(rte_mlx5_pmd_init);
+static void
+rte_mlx5_pmd_init(void)
+{
+	/*
+	 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
+	 * huge pages. Calling ibv_fork_init() during init allows
+	 * applications to use fork() safely for purposes other than
+	 * using this PMD, which is not supported in forked processes.
+	 */
+	setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
+	ibv_fork_init();
+	rte_eal_pci_register(&mlx5_driver.pci_drv);
+}
+
+RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
+RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
+#endif