diff options
| author |   Ido Barnea <ibarnea@cisco.com> | 2016-08-02 13:45:19 +0300 |
|---|---|---|
| committer | Ido Barnea <ibarnea@cisco.com> | 2016-08-03 16:35:11 +0300 |
| commit | 66c49a9d8ee5353dfa60eb90fc93eb4f4abf095e (patch) | |
| tree | cb714b8a628afaca0c8558ee9b60394ef8f9c785 /src/dpdk/drivers/net | |
| parent | c0b0c84099b91be79bdd7b53f74b2d504b9edd31 (diff) | |
IPv6 XL710 stateless support and stateful --rx-check
Diffstat (limited to 'src/dpdk/drivers/net')
| -rw-r--r-- | src/dpdk/drivers/net/i40e/i40e_ethdev.c | 42 | ||||
| -rw-r--r-- | src/dpdk/drivers/net/i40e/i40e_fdir.c | 6 |
2 files changed, 29 insertions, 19 deletions
diff --git a/src/dpdk/drivers/net/i40e/i40e_ethdev.c b/src/dpdk/drivers/net/i40e/i40e_ethdev.c index 0e66be74..d9d2b969 100644 --- a/src/dpdk/drivers/net/i40e/i40e_ethdev.c +++ b/src/dpdk/drivers/net/i40e/i40e_ethdev.c @@ -784,27 +784,33 @@ static inline void i40e_filter_fields_reg_init(struct i40e_hw *hw) I40E_WRITE_REG(hw, I40E_GLQF_ORT(12), 0x00000062); I40E_WRITE_REG(hw, I40E_GLQF_PIT(2), 0x000024A0); - I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(31, 0), 0); - I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(33, 0), 0); - I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(41, 0), 0); - I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(41, 1), 0x00080000); - I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(43, 0), 0); - I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(43, 1), 0x00080000); - I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(34, 0), 0); - I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(34, 1), 0x00040000); - // filter IP according to ttl and L4 protocol - I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(35, 0), 0); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV4_UDP, 0), 0); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV4_TCP, 0), 0); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER, 0), 0); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV6_UDP, 0), 0); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV6_TCP, 0), 0); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER, 0), 0); if (trex_mode == 1) { - I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(35, 1), 0x00100000); - I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(31, 1), 0x00100000); - I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(33, 1), 0x00100000); + // stateless + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV4_UDP, 1), 0x00100000); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV4_TCP, 1), 0x00100000); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER, 1), 0x00100000); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV6_UDP, 1), 0x0000000000200000ULL); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV6_TCP, 1), 0x0000000000200000ULL); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER, 1), 0x0000000000200000ULL); } else { - I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(35, 1), 0x00040000); - I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(31, 1), 0x00040000); - I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(33, 1), 0x00040000); + //stateful + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV4_UDP, 1), 0x00040000); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV4_TCP, 1), 0x00040000); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER, 1), 0x00040000); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV6_UDP, 1), 0x00080000); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV6_TCP, 1), 0x00080000); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER, 1), 0x00080000); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV4_SCTP, 0), 0); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV4_SCTP, 1), 0x00040000); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV6_SCTP, 0), 0); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(I40E_FILTER_PCTYPE_NONF_IPV6_SCTP, 1), 0x00080000); } - I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(44, 0), 0); - I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(44, 1), 0x00080000); I40E_WRITE_REG(hw, I40E_GLQF_FD_MSK(0, 34), 0x000DFF00); I40E_WRITE_REG(hw, I40E_GLQF_FD_MSK(0,44), 0x000C00FF); I40E_WRITE_FLUSH(hw); diff --git a/src/dpdk/drivers/net/i40e/i40e_fdir.c b/src/dpdk/drivers/net/i40e/i40e_fdir.c index 990937ec..33cb6dab 100644 --- a/src/dpdk/drivers/net/i40e/i40e_fdir.c +++ b/src/dpdk/drivers/net/i40e/i40e_fdir.c @@ -755,7 +755,11 @@ i40e_fdir_fill_eth_ip_head(const struct rte_eth_fdir_input *fdir_input, ip6->vtc_flow = rte_cpu_to_be_32(I40E_FDIR_IPv6_DEFAULT_VTC_FLOW | (fdir_input->flow.ipv6_flow.tc << - I40E_FDIR_IPv6_TC_OFFSET)); + I40E_FDIR_IPv6_TC_OFFSET) +#ifdef TREX_PATCH + | (fdir_input->flow.ipv6_flow.flow_label & 0x000fffff) +#endif + ); ip6->payload_len = rte_cpu_to_be_16(I40E_FDIR_IPv6_PAYLOAD_LEN); ip6->proto = fdir_input->flow.ipv6_flow.proto ? |