diff options
author | 2015-12-14 05:12:45 +0200 | |
---|---|---|
committer | 2015-12-27 08:51:30 +0200 | |
commit | 7de16b05fa2ef6feeec8370b36037a59aeb1f8e5 (patch) | |
tree | b989ba0dc8668d60e7a24a497bee7e9ed2bddafb /src/dpdk22/drivers/net/i40e | |
parent | 509648b87434b9032d38b8ca5ad470ba3edcc036 (diff) |
Changes only to DPDK files: dpdk22 40G fixes for TTL and ip_protocol match and IPv6 support + TX hang issue fix
Diffstat (limited to 'src/dpdk22/drivers/net/i40e')
-rw-r--r-- | src/dpdk22/drivers/net/i40e/i40e_ethdev.c | 50 | ||||
-rw-r--r-- | src/dpdk22/drivers/net/i40e/i40e_fdir.c | 22 |
2 files changed, 68 insertions, 4 deletions
diff --git a/src/dpdk22/drivers/net/i40e/i40e_ethdev.c b/src/dpdk22/drivers/net/i40e/i40e_ethdev.c index 57de71d5..7542ade1 100644 --- a/src/dpdk22/drivers/net/i40e/i40e_ethdev.c +++ b/src/dpdk22/drivers/net/i40e/i40e_ethdev.c @@ -690,6 +690,52 @@ static inline void i40e_flex_payload_reg_init(struct i40e_hw *hw) #define I40E_FLOW_CONTROL_ETHERTYPE 0x8808 +#define TREX_PATCH +#ifdef TREX_PATCH +#define I40E_PRTQF_FD_INSET(_i, _j) (0x00250000 + ((_i) * 64 + (_j) * 32)) +#define I40E_GLQF_FD_MSK(_i, _j) (0x00267200 + ((_i) * 4 + (_j) * 8)) + +static void i40e_dump_filter_regs(struct i40e_hw *hw) +{ + int reg_nums[] = {31, 33, 34, 35, 41, 43}; + int i; + uint32_t reg; + + for (i =0; i < sizeof (reg_nums)/sizeof(int); i++) { + reg = I40E_READ_REG(hw,I40E_PRTQF_FD_INSET(reg_nums[i], 0)); + printf("I40E_PRTQF_FD_INSET(%d, 0): 0x%08x\n", reg_nums[i], reg); + reg = I40E_READ_REG(hw,I40E_PRTQF_FD_INSET(reg_nums[i], 1)); + printf("I40E_PRTQF_FD_INSET(%d, 1): 0x%08x\n", reg_nums[i], reg); + } +} + +static inline void i40e_filter_fields_reg_init(struct i40e_hw *hw) +{ + uint32_t reg; + + I40E_WRITE_REG(hw, I40E_GLQF_ORT(12), 0x00000062); + I40E_WRITE_REG(hw, I40E_GLQF_PIT(2), 0x000024A0); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(31, 0), 0); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(31, 1), 0x00040000); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(33, 0), 0); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(33, 1), 0x00040000); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(41, 0), 0); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(41, 1), 0x00080000); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(43, 0), 0); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(43, 1), 0x00080000); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(34, 0), 0); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(34, 1), 0x00040000); + // filter IP according to ttl and L4 protocol + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(35, 0), 0); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(35, 1), 0x00040000); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(44, 0), 0); + I40E_WRITE_REG(hw, I40E_PRTQF_FD_INSET(44, 1), 0x00080000); + I40E_WRITE_REG(hw, I40E_GLQF_FD_MSK(0, 34), 0x000DFF00); + I40E_WRITE_REG(hw, I40E_GLQF_FD_MSK(0,44), 0x000C00FF); + I40E_WRITE_FLUSH(hw); +} +#endif //TREX_PATCH + /* * Add a ethertype filter to drop all flow control frames transmitted * from VSIs. @@ -786,7 +832,11 @@ eth_i40e_dev_init(struct rte_eth_dev *dev) * for flexible payload by software. * It should be removed once issues are fixed in NVM. */ +#ifdef TREX_PATCH + i40e_filter_fields_reg_init(hw); +#else i40e_flex_payload_reg_init(hw); +#endif /* Initialize the parameters for adminq */ i40e_init_adminq_parameter(hw); diff --git a/src/dpdk22/drivers/net/i40e/i40e_fdir.c b/src/dpdk22/drivers/net/i40e/i40e_fdir.c index 9ad6981c..194f8629 100644 --- a/src/dpdk22/drivers/net/i40e/i40e_fdir.c +++ b/src/dpdk22/drivers/net/i40e/i40e_fdir.c @@ -719,7 +719,8 @@ i40e_fdir_fill_eth_ip_head(const struct rte_eth_fdir_input *fdir_input, ip->version_ihl = I40E_FDIR_IP_DEFAULT_VERSION_IHL; /* set len to by default */ ip->total_length = rte_cpu_to_be_16(I40E_FDIR_IP_DEFAULT_LEN); - ip->time_to_live = I40E_FDIR_IP_DEFAULT_TTL; + // TREX_PATCH + ip->time_to_live = fdir_input->flow.ip4_flow.ttl; /* * The source and destination fields in the transmitted packet * need to be presented in a reversed order with respect @@ -727,7 +728,13 @@ i40e_fdir_fill_eth_ip_head(const struct rte_eth_fdir_input *fdir_input, */ ip->src_addr = fdir_input->flow.ip4_flow.dst_ip; ip->dst_addr = fdir_input->flow.ip4_flow.src_ip; - ip->next_proto_id = next_proto[fdir_input->flow_type]; + // TREX_PATCH + if (fdir_input->flow_type == RTE_ETH_FLOW_FRAG_IPV4 + || fdir_input->flow_type == RTE_ETH_FLOW_NONFRAG_IPV4_OTHER) { + ip->next_proto_id = fdir_input->flow.ip4_flow.l4_protocol; + } else { + ip->next_proto_id = next_proto[fdir_input->flow_type]; + } break; case RTE_ETH_FLOW_NONFRAG_IPV6_TCP: case RTE_ETH_FLOW_NONFRAG_IPV6_UDP: @@ -741,7 +748,8 @@ i40e_fdir_fill_eth_ip_head(const struct rte_eth_fdir_input *fdir_input, rte_cpu_to_be_32(I40E_FDIR_IPv6_DEFAULT_VTC_FLOW); ip6->payload_len = rte_cpu_to_be_16(I40E_FDIR_IPv6_PAYLOAD_LEN); - ip6->hop_limits = I40E_FDIR_IPv6_DEFAULT_HOP_LIMITS; + // TREX_PATCH + ip6->hop_limits = fdir_input->flow.ipv6_flow.hop_limit; /* * The source and destination fields in the transmitted packet @@ -754,7 +762,13 @@ i40e_fdir_fill_eth_ip_head(const struct rte_eth_fdir_input *fdir_input, rte_memcpy(&(ip6->dst_addr), &(fdir_input->flow.ipv6_flow.src_ip), IPV6_ADDR_LEN); - ip6->proto = next_proto[fdir_input->flow_type]; + // TREX_PATCH + if (fdir_input->flow_type == RTE_ETH_FLOW_FRAG_IPV6 + || fdir_input->flow_type == RTE_ETH_FLOW_NONFRAG_IPV6_OTHER) { + ip6->proto = fdir_input->flow.ipv6_flow.l4_protocol; + } else { + ip6->proto = next_proto[fdir_input->flow_type]; + } break; default: PMD_DRV_LOG(ERR, "unknown flow type %u.", |