diff options
author | 2016-06-21 17:35:32 +0300 | |
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committer | 2016-06-21 17:35:32 +0300 | |
commit | 365826c5db225f21283c48eebc8de62b89fbfa24 (patch) | |
tree | d99778d169e8142f5bb1fb960e06c0688b6aefb4 /src/dpdk22 | |
parent | 55e52d1a49092a6753df2fb61ca43b314e7d7573 (diff) |
fix i40e Intel latency issue using 2 Qset and BW limit to 99.9% see more trex-214 issue
Diffstat (limited to 'src/dpdk22')
-rw-r--r-- | src/dpdk22/drivers/net/i40e/i40e_ethdev.c | 54 | ||||
-rw-r--r-- | src/dpdk22/drivers/net/i40e/i40e_ethdev.h | 1 | ||||
-rw-r--r-- | src/dpdk22/drivers/net/i40e/i40e_rxtx.c | 37 |
3 files changed, 90 insertions, 2 deletions
diff --git a/src/dpdk22/drivers/net/i40e/i40e_ethdev.c b/src/dpdk22/drivers/net/i40e/i40e_ethdev.c index ae195683..b73eedf1 100644 --- a/src/dpdk22/drivers/net/i40e/i40e_ethdev.c +++ b/src/dpdk22/drivers/net/i40e/i40e_ethdev.c @@ -3868,6 +3868,26 @@ i40e_update_default_filter_setting(struct i40e_vsi *vsi) return i40e_vsi_add_mac(vsi, &filter); } +static int +i40e_vsi_update_tc_max_bw(struct i40e_vsi *vsi, u16 credit){ + struct i40e_hw *hw = I40E_VSI_TO_HW(vsi); + int ret; + + if (!vsi->seid) { + PMD_DRV_LOG(ERR, "seid not valid"); + return -EINVAL; + } + + ret = i40e_aq_config_vsi_bw_limit(hw, vsi->seid, credit,0, NULL); + if (ret != I40E_SUCCESS) { + PMD_DRV_LOG(ERR, "Failed to configure TC BW"); + return ret; + } + return (0); +} + + + #define I40E_3_BIT_MASK 0x7 /* * i40e_vsi_get_bw_config - Query VSI BW Information @@ -4426,6 +4446,40 @@ i40e_pf_setup(struct i40e_pf *pf) } pf->main_vsi = vsi; + +#define LOW_LATENCY_WORKAROUND +#ifdef LOW_LATENCY_WORKAROUND + + /* + Workaround for low latency issue. + It seems RR does not work as expected both from same QSet and from different QSet + Quanta could be very high and this creates very high latency, especially with long packet size (9K) + This is a workaround limit the main (bulk) VSI to 99% of the BW and by that support low latency (suggested by Intel) + ETS with with strict priority and 127 credit does not work . + + */ + + if (hw->phy.link_info.link_speed == I40E_LINK_SPEED_10GB) { + i40e_vsi_update_tc_max_bw(vsi,199); + }else{ + if (hw->phy.link_info.link_speed == I40E_LINK_SPEED_40GB) { + i40e_vsi_update_tc_max_bw(vsi,799); + }else{ + PMD_DRV_LOG(ERR, "Unknown phy speed %d",hw->phy.link_info.link_speed); + } + } + + /* add for low latency a new VSI for Queue set */ + vsi = i40e_vsi_setup(pf, I40E_VSI_VMDQ2, vsi, 0); + if (!vsi) { + PMD_DRV_LOG(ERR, "Setup of low latency vsi failed"); + return I40E_ERR_NOT_READY; + } + + pf->ll_vsi = vsi; + +#endif + /* Configure filter control */ memset(&settings, 0, sizeof(settings)); if (hw->func_caps.rss_table_size == ETH_RSS_RETA_SIZE_128) diff --git a/src/dpdk22/drivers/net/i40e/i40e_ethdev.h b/src/dpdk22/drivers/net/i40e/i40e_ethdev.h index 1f9792b3..44082dfa 100644 --- a/src/dpdk22/drivers/net/i40e/i40e_ethdev.h +++ b/src/dpdk22/drivers/net/i40e/i40e_ethdev.h @@ -396,6 +396,7 @@ TAILQ_HEAD(i40e_mirror_rule_list, i40e_mirror_rule); struct i40e_pf { struct i40e_adapter *adapter; /* The adapter this PF associate to */ struct i40e_vsi *main_vsi; /* pointer to main VSI structure */ + struct i40e_vsi * ll_vsi; uint16_t mac_seid; /* The seid of the MAC of this PF */ uint16_t main_vsi_seid; /* The seid of the main VSI */ uint16_t max_num_vsi; diff --git a/src/dpdk22/drivers/net/i40e/i40e_rxtx.c b/src/dpdk22/drivers/net/i40e/i40e_rxtx.c index 39d94eca..d3ef00f8 100644 --- a/src/dpdk22/drivers/net/i40e/i40e_rxtx.c +++ b/src/dpdk22/drivers/net/i40e/i40e_rxtx.c @@ -1923,6 +1923,31 @@ i40e_xmit_pkts_simple(void *tx_queue, return nb_tx; } + +static struct i40e_vsi* +i40e_pf_tx_get_vsi_by_qindex(struct i40e_pf *pf, uint16_t queue_idx) +{ + /* the queue in MAIN VSI range */ + if (queue_idx == pf->dev_data->nb_tx_queues-1) { + return pf->ll_vsi; + } + + if (queue_idx < pf->dev_data->nb_tx_queues) + return pf->main_vsi; + + + queue_idx -= pf->main_vsi->nb_qps; + + /* queue_idx is greater than VMDQ VSIs range */ + if (queue_idx > pf->nb_cfg_vmdq_vsi * pf->vmdq_nb_qps - 1) { + PMD_INIT_LOG(ERR, "queue_idx out of range. VMDQ configured?"); + return NULL; + } + + return pf->vmdq[queue_idx / pf->vmdq_nb_qps].vsi; +} + + /* * Find the VSI the queue belongs to. 'queue_idx' is the queue index * application used, which assume having sequential ones. But from driver's @@ -2314,6 +2339,8 @@ i40e_dev_rx_descriptor_done(void *rx_queue, uint16_t offset) return ret; } +#define LOW_LATENCY_WORKAROUND + int i40e_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, @@ -2334,8 +2361,14 @@ i40e_dev_tx_queue_setup(struct rte_eth_dev *dev, struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); vsi = &vf->vsi; - } else - vsi = i40e_pf_get_vsi_by_qindex(pf, queue_idx); + } else{ + #ifdef LOW_LATENCY_WORKAROUND + vsi = i40e_pf_tx_get_vsi_by_qindex(pf, queue_idx); + #else + vsi = i40e_pf_get_vsi_by_qindex(pf, queue_idx); + #endif + } + if (vsi == NULL) { PMD_DRV_LOG(ERR, "VSI is NULL, or queue index (%u) " |