diff options
| author |   Ido Barnea <ibarnea@cisco.com> | 2016-05-18 16:53:42 +0300 |
|---|---|---|
| committer | Ido Barnea <ibarnea@cisco.com> | 2016-05-18 19:23:58 +0300 |
| commit | cc2abc13f1f74612b211d3cd235341745b16bd49 (patch) | |
| tree | a35f5b0e0f9388d4be5ca25337fa6dbef2c0d8a9 /src/stateless/rx | |
| parent | 91120a37444f8a2f5e1d676f9a091f54346a3cfd (diff) | |
Change to latency python + small fixes
Diffstat (limited to 'src/stateless/rx')
| -rw-r--r-- | src/stateless/rx/trex_stateless_rx_core.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/stateless/rx/trex_stateless_rx_core.cpp b/src/stateless/rx/trex_stateless_rx_core.cpp index 39ecb4f2..7239626e 100644 --- a/src/stateless/rx/trex_stateless_rx_core.cpp +++ b/src/stateless/rx/trex_stateless_rx_core.cpp @@ -153,7 +153,8 @@ void CRxCoreStateless::handle_rx_pkt(CLatencyManagerPerPortStl *lp, rte_mbuf_t * } else { m_rfc2544[hw_id].out_of_order += 1; // We thought it was lost, but it was just out of order - m_rfc2544[hw_id].seq_err -= 1; + if (m_rfc2544[hw_id].seq_err > 0) + m_rfc2544[hw_id].seq_err -= 1; } m_rfc2544[hw_id].seq_err_events_too_low++; } @@ -165,7 +166,8 @@ void CRxCoreStateless::handle_rx_pkt(CLatencyManagerPerPortStl *lp, rte_mbuf_t * } else { m_rfc2544[hw_id].out_of_order += 1; // We thought it was lost, but it was just out of order - m_rfc2544[hw_id].seq_err -= 1; + if (m_rfc2544[hw_id].seq_err > 0) + m_rfc2544[hw_id].seq_err -= 1; } m_rfc2544[hw_id].seq_err_events_too_low++; } else { |