1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
|
/*-
* BSD LICENSE
*
* Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _RTE_VECT_H_
#define _RTE_VECT_H_
/**
* @file
*
* RTE SSE/AVX related header.
*/
#if (defined(__ICC) || (__GNUC__ == 4 && __GNUC_MINOR__ < 4))
#ifdef __SSE__
#include <xmmintrin.h>
#endif
#ifdef __SSE2__
#include <emmintrin.h>
#endif
#ifdef __SSE3__
#include <tmmintrin.h>
#endif
#if defined(__SSE4_2__) || defined(__SSE4_1__)
#include <smmintrin.h>
#endif
#if defined(__AVX__)
#include <immintrin.h>
#endif
#else
#include <x86intrin.h>
#endif
#ifdef __cplusplus
extern "C" {
#endif
typedef __m128i xmm_t;
#define XMM_SIZE (sizeof(xmm_t))
#define XMM_MASK (XMM_SIZE - 1)
typedef union rte_xmm {
xmm_t x;
uint8_t u8[XMM_SIZE / sizeof(uint8_t)];
uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
double pd[XMM_SIZE / sizeof(double)];
} rte_xmm_t;
#ifdef __AVX__
typedef __m256i ymm_t;
#define YMM_SIZE (sizeof(ymm_t))
#define YMM_MASK (YMM_SIZE - 1)
typedef union rte_ymm {
ymm_t y;
xmm_t x[YMM_SIZE / sizeof(xmm_t)];
uint8_t u8[YMM_SIZE / sizeof(uint8_t)];
uint16_t u16[YMM_SIZE / sizeof(uint16_t)];
uint32_t u32[YMM_SIZE / sizeof(uint32_t)];
uint64_t u64[YMM_SIZE / sizeof(uint64_t)];
double pd[YMM_SIZE / sizeof(double)];
} rte_ymm_t;
#endif /* __AVX__ */
#ifdef RTE_ARCH_I686
#define _mm_cvtsi128_si64(a) ({ \
rte_xmm_t m; \
m.x = (a); \
(m.u64[0]); \
})
#endif
/*
* Prior to version 12.1 icc doesn't support _mm_set_epi64x.
*/
#if (defined(__ICC) && __ICC < 1210)
#define _mm_set_epi64x(a, b) ({ \
rte_xmm_t m; \
m.u64[0] = b; \
m.u64[1] = a; \
(m.x); \
})
#endif /* (defined(__ICC) && __ICC < 1210) */
#ifdef __cplusplus
}
#endif
#endif /* _RTE_VECT_H_ */
|
