diff options
| author |   Lijian.Zhang <Lijian.Zhang@arm.com> | 2020-02-18 19:58:19 +0800 |
|---|---|---|
| committer |   Damjan Marion <dmarion@me.com> | 2020-04-30 10:18:39 +0000 |
| commit | 690ce8672c090709924b924af1e49ffc38d8f00c (patch) | |
| tree | 68bb72374590e850fe0958fba2a236f83f8ac171 | |
| parent | e09912001f1e62a39b033b3e1c14854dc7c6f52f (diff) | |
build: support arch-specific compiling for Neoverse N1
Enable arch-specific compiling and dynamic optimal function selection
for Arm Neoverse-N1.
Support for -march=armv8.2-a+crc+crypto -mtune=neoverse-n1 for
Neoverse-N1 is added starting from gcc-9.2.0
without change with change improvement
[L2 - 1x flows] 11.00 Mpps 11.46 Mpps 4%
[L2 - 10Kx flows] 6.83 Mpps 7.17 Mpps 5%
[L3 - 1x flows] 10.39 Mpps 10.78 Mpps 3.7%
[L3 - 10Kx flows] 6.67 Mpps 7.19 Mpps 7.8%
Type: feature
Change-Id: I5d24d17820b3dd6909b913202e8c31fc7d48650f
Signed-off-by: Lijian Zhang <Lijian.Zhang@arm.com>
Reviewed-by: Jieqiang Wang <Jieqiang.Wang@arm.com>
Reviewed-by: Govindarajan Mohandoss <Govindarajan.Mohandoss@arm.com>
| -rw-r--r-- | src/cmake/cpu.cmake | 4 | ||||
| -rw-r--r-- | src/vppinfra/cpu.h | 11 |
2 files changed, 15 insertions, 0 deletions
diff --git a/src/cmake/cpu.cmake b/src/cmake/cpu.cmake index 916fe0d1ddd..0ce8bea31ec 100644 --- a/src/cmake/cpu.cmake +++ b/src/cmake/cpu.cmake @@ -107,6 +107,10 @@ elseif(CMAKE_SYSTEM_PROCESSOR MATCHES "^(aarch64.*|AARCH64.*)") if(compiler_flag_march_cortexa72) list(APPEND MARCH_VARIANTS "cortexa72\;-march=armv8-a+crc+crypto -mtune=cortex-a72 -DCLIB_N_PREFETCHES=6") endif() + check_c_compiler_flag("-march=armv8.2-a+crc+crypto -mtune=neoverse-n1" compiler_flag_march_neoversen1) + if(compiler_flag_march_neoversen1) + list(APPEND MARCH_VARIANTS "neoversen1\;-march=armv8.2-a+crc+crypto -mtune=neoverse-n1 -DCLIB_N_PREFETCHES=6") + endif() endif() macro(vpp_library_set_multiarch_sources lib) diff --git a/src/vppinfra/cpu.h b/src/vppinfra/cpu.h index 48c68a11699..7bd5dfe9722 100644 --- a/src/vppinfra/cpu.h +++ b/src/vppinfra/cpu.h @@ -322,6 +322,8 @@ clib_cpu_part () #define AARCH64_CPU_PART_QDF24XX 0xc00 #define AARCH64_CPU_IMPLEMENTER_CORTEXA72 0x41 #define AARCH64_CPU_PART_CORTEXA72 0xd08 +#define AARCH64_CPU_IMPLEMENTER_NEOVERSEN1 0x41 +#define AARCH64_CPU_PART_NEOVERSEN1 0xd0c static inline int clib_cpu_march_priority_thunderx2t99 () @@ -350,6 +352,15 @@ clib_cpu_march_priority_cortexa72 () return -1; } +static inline int +clib_cpu_march_priority_neoversen1 () +{ + if ((AARCH64_CPU_IMPLEMENTER_NEOVERSEN1 == clib_cpu_implementer ()) && + (AARCH64_CPU_PART_NEOVERSEN1 == clib_cpu_part ())) + return 10; + return -1; +} + #ifdef CLIB_MARCH_VARIANT #define CLIB_MARCH_FN_PRIORITY() CLIB_MARCH_SFX(clib_cpu_march_priority)() #else |