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authorRay Kinsella <mdr@ashroe.eu>2020-12-18 10:39:46 +0000
committerNeale Ranns <neale@graphiant.com>2021-01-12 13:10:09 +0000
commit480600662ccbe6175971053ac732e1e92295a43f (patch)
treebe9bcbeffcf6ab3e54439460fcd65a98c8a06bec
parente8f848a56e97cb4f62c4159cd83f68b211025559 (diff)
ip: vtep fixes for alignment and cache update.
Minor fixes for Intel AVX-512 alignment, and cache update. Type: fix Signed-off-by: Ray Kinsella <mdr@ashroe.eu> Change-Id: I9f9bebb4ecb3265ffc765affd1ed94d0ba979066
-rw-r--r--src/vnet/ip/vtep.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/vnet/ip/vtep.h b/src/vnet/ip/vtep.h
index 0fdc4c5a346..4cb06122f46 100644
--- a/src/vnet/ip/vtep.h
+++ b/src/vnet/ip/vtep.h
@@ -130,11 +130,11 @@ vtep4_check_vector (vtep_table_t * t, vlib_buffer_t * b0, ip4_header_t * ip40,
#ifdef CLIB_HAVE_VEC512
u64x8 k4_u64x8 = u64x8_splat (k4.as_u64);
- u64x8 cache = u64x8_load_aligned (vtep4_u512->vtep4_cache);
+ u64x8 cache = u64x8_load_unaligned (vtep4_u512->vtep4_cache);
u8 result = u64x8_mask_is_equal (cache, k4_u64x8);
if (PREDICT_TRUE (result != 0))
{
- k4.as_u64 =
+ last_k4->as_u64 =
vtep4_u512->vtep4_cache[count_trailing_zeros (result)].as_u64;
return VTEP_CHECK_PASS_UNCHANGED;
}