diff options
| author |   Marco Varlese <marco.varlese@suse.com> | 2018-09-07 11:02:26 +0200 |
|---|---|---|
| committer |   Damjan Marion <dmarion@me.com> | 2018-09-07 19:36:48 +0000 |
| commit | 0745036cb9ead1a3aaf9686c8c8046cb7285ea52 (patch) | |
| tree | dd63943e0dd287bf6588166d0cac8277994f1e89 | |
| parent | 4e588aa7ca89b966fd9ec2fc6b02d75df23ae648 (diff) | |
Cavium OcteonTX: cache line fix
According to Nitin Saxena ThunderX2 machine has 64B cache line whilst
all others are 128B. According to Damjan, Nitin's previous patch broke
compilation for all non-Cavium machines. This patch should make
everything happy again.
Change-Id: I8c5c2661f9f2f9c3e9b0965a277712f9a1eefa5f
Signed-off-by: Marco Varlese <marco.varlese@suse.com>
| -rw-r--r-- | src/cmake/cpu.cmake | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/src/cmake/cpu.cmake b/src/cmake/cpu.cmake index ef0393684cb..8ea050b4d23 100644 --- a/src/cmake/cpu.cmake +++ b/src/cmake/cpu.cmake @@ -25,17 +25,21 @@ if(CMAKE_SYSTEM_PROCESSOR MATCHES "^(aarch64.*|AARCH64.*)") string(STRIP ${value} value) if(${name} STREQUAL "CPU implementer") set(CPU_IMPLEMENTER ${value}) - endif() + endif() if(${name} STREQUAL "CPU part") set(CPU_PART ${value}) - endif() + endif() endforeach() # Implementer 0x43 - Cavium # Part 0x0af - ThunderX2 is 64B, rest all are 128B - if (${CPU_IMPLEMENTER} STREQUAL "0x43" AND ${CPU_PART} STREQUAL "0x0af") - set(VPP_LOG2_CACHE_LINE_SIZE 6) + if (${CPU_IMPLEMENTER} STREQUAL "0x43") + if (${CPU_PART} STREQUAL "0x0af") + set(VPP_LOG2_CACHE_LINE_SIZE 6) + else() + set(VPP_LOG2_CACHE_LINE_SIZE 7) + endif() else() - set(VPP_LOG2_CACHE_LINE_SIZE 7) + set(VPP_LOG2_CACHE_LINE_SIZE 6) endif() math(EXPR VPP_CACHE_LINE_SIZE "1 << ${VPP_LOG2_CACHE_LINE_SIZE}") message(STATUS "ARM AArch64 CPU implementer ${CPU_IMPLEMENTER} part ${CPU_PART} cacheline size ${VPP_CACHE_LINE_SIZE}") |