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authorLeyi Rong <leyi.rong@intel.com>2023-03-08 13:34:56 +0800
committerDamjan Marion <dmarion@0xa5.net>2023-03-10 15:57:09 +0000
commit767a9ab4b1f77760a633ba3de30a0dcad44cb4b1 (patch)
treedc742984919960e2dda931734ae2650ce2b5f451 /build-root
parent7b0d48fbb3ceebcafb18177fba02ab1a9ad4c24e (diff)
vlib: 512-bit SIMD version of vlib_buffer_free
Process 8 packets perf batch in vlib_buffer_free_inline() when CLIB_HAVE_VEC512 is enabled. Type: improvement Signed-off-by: Leyi Rong <leyi.rong@intel.com> Change-Id: I78b8a525bce25ee355c9bf0e0f651698a8c45bda
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