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author | 2017-08-30 04:23:43 -0400 | |
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committer | 2017-09-01 07:07:04 -0400 | |
commit | 484d406a19b9cde41e3ffaed6fac4e8c099d4e06 (patch) | |
tree | 175473f8bf12c2cc016481b7c17dd0d54976cee7 /doxygen/assets/logo_fdio.png | |
parent | ce9714032d36d18abe72981552219dff871ff392 (diff) |
Improve L2FIB PDR/NDR performance (VPP-963)
1. Limit MAC entry update per l2-learn call to reduce update burst
when wall clock advance to the the next minute so all MAC time
stamps are behind current time.
2. Optimize l2-learn node fast path code sequence.
3. Invalidate cache_key when update MAC entry.
4. Change L2 learn hit counter to L2 learn hit-update counter.
5. Increase L2FIB table memory size to 512MB to fit 4M entries
6. Set MAC learn limit at 4M entries
Change-Id: I19572f7f8a4b42a01be025a609fb03af50af16b2
Signed-off-by: John Lo <loj@cisco.com>
Diffstat (limited to 'doxygen/assets/logo_fdio.png')
0 files changed, 0 insertions, 0 deletions