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| author |   Vadym Martsynovskyy <vmartsyn@fb.com> | 2020-06-12 09:50:50 -0700 |
|---|---|---|
| committer |   Damjan Marion <dmarion@me.com> | 2020-06-27 10:27:55 +0000 |
| commit | 42386fc974148f812ef3eb73ff09a603caa23565 (patch) | |
| tree | ed58f0e607b72aa86a0d8cc2a092fa54ef058027 /doxygen/siphon-generate | |
| parent | edc2ea435b5c407a78f4fcb42d750338d6cdd6d5 (diff) | |
udp: align udp_encap_t_ to 2 cachelines
Based on the comments in the struct, udp_encap_t_ is meant to span 2
cachelines. Due to the 64 bit alignment of dpo_id_t, the struct spanned
3 cachelines. This caused fetching ue_ip_proto to trigger an additional
cache miss. This patch rearranges the ordering of the struct fields
so that udp_encap_t_ only spans 2 cachelines as intended.
before:
(gdb) print (int)&((struct udp_encap_t_*)0)->cacheline1
$8 = 128
after:
(gdb) print (int)&((struct udp_encap_t_*)0)->cacheline1
$1 = 64
Type: fix
Signed-off-by: Vadym Martsynovskyy <vmartsyn@fb.com>
Change-Id: I066c08654d4a8ef3e2d3954e957d4c5d382b209f
Diffstat (limited to 'doxygen/siphon-generate')
0 files changed, 0 insertions, 0 deletions