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| author |   Klement Sekera <ksekera@cisco.com> | 2020-01-15 10:30:48 +0000 |
|---|---|---|
| committer |   Ole Trøan <otroan@employees.org> | 2020-01-15 21:37:55 +0000 |
| commit | 8ad070e10246536fc1c514cbf16f2c51030cbee0 (patch) | |
| tree | ab56829a26064495f7083c66a74fa9e7f3018863 /doxygen/siphon/generate_syscfg.py | |
| parent | e5060b33bd680aef7fb0ba80a5123532f07e6300 (diff) | |
ip: align reass.save_rewrite_lengthv20.05-rc0
By aligning vnet_buffer_opaque.ip.save_rewrite_length and
vnet_buffer_opaque.ip.reass.save_rewrite_length we prevent shallow
virtual reassembly code from overwrite save_rewrite_length, allowing
other features down the pipe to rely on this value.
A static assert is added to guard this alignment.
Type: fix
Fixes: f126e746fc01c75bc99329d10ce9127b26b23814
Change-Id: Ie7c7f3abc2a221bbcf2830c0f006a4368088b342
Signed-off-by: Klement Sekera <ksekera@cisco.com>
Diffstat (limited to 'doxygen/siphon/generate_syscfg.py')
0 files changed, 0 insertions, 0 deletions