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authorRadu Nicolau <radu.nicolau@intel.com>2021-01-14 10:25:02 +0000
committerDamjan Marion <dmarion@me.com>2021-01-21 13:39:12 +0000
commite1480a2c12ff764622dd2ae1bc9bce6cd25bcbdd (patch)
treeb3b35b537b2428ce32fcdefcb040e2f3878b6f9f /src/plugins/avf/avf.h
parentf35fef244682645762cdff14cf313a42dd2d750c (diff)
avf: use write combining store for queues tail update
Performance improvement: on supported platforms, currently only Intel Tremont, use a write combining store to update the tail pointers. Also, Tremont node variant is added for all. Type: improvement Signed-off-by: Radu Nicolau <radu.nicolau@intel.com> Change-Id: Ie9606e403b7d9655184f778e3ffee3027c8c9edd
Diffstat (limited to 'src/plugins/avf/avf.h')
-rw-r--r--src/plugins/avf/avf.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/plugins/avf/avf.h b/src/plugins/avf/avf.h
index b3fcc259206..23cc36c4882 100644
--- a/src/plugins/avf/avf.h
+++ b/src/plugins/avf/avf.h
@@ -373,6 +373,17 @@ avf_reg_flush (avf_device_t * ad)
asm volatile ("":::"memory");
}
+static inline void
+avf_tail_write (volatile u32 *addr, u32 val)
+{
+#ifdef __MOVDIRI__
+ _mm_sfence ();
+ _directstoreu_u32 ((void *) addr, val);
+#else
+ clib_atomic_store_rel_n (addr, val);
+#endif
+}
+
static_always_inline int
avf_rxd_is_not_eop (avf_rx_desc_t * d)
{