diff options
author | Damjan Marion <damarion@cisco.com> | 2023-03-14 18:04:45 +0000 |
---|---|---|
committer | Beno�t Ganne <bganne@cisco.com> | 2023-03-15 14:58:56 +0000 |
commit | adeaf16960f8895eb246b388553a49d2ade80dc4 (patch) | |
tree | 67972168a800f4bb45e18fe7669dd4ef79c04842 /src/plugins/crypto_native/aes.h | |
parent | 1ca681838c939135b067b2db79b0c540fd803e37 (diff) |
crypto-native: 256-bit AES CBC support
Used on intel client CPUs which suppport VAES instruction set without
AVX512
Type: improvement
Change-Id: I5f816a1ea9f89a8d298d2c0f38d8d7c06f414ba0
Signed-off-by: Damjan Marion <damarion@cisco.com>
Diffstat (limited to 'src/plugins/crypto_native/aes.h')
-rw-r--r-- | src/plugins/crypto_native/aes.h | 28 |
1 files changed, 27 insertions, 1 deletions
diff --git a/src/plugins/crypto_native/aes.h b/src/plugins/crypto_native/aes.h index e0d832276e0..40fe681e2b7 100644 --- a/src/plugins/crypto_native/aes.h +++ b/src/plugins/crypto_native/aes.h @@ -48,7 +48,7 @@ aes_enc_round (u8x16 a, u8x16 k) #endif } -#if defined (__VAES__) +#if defined(__VAES__) && defined(__AVX512F__) static_always_inline u8x64 aes_enc_round_x4 (u8x64 a, u8x64 k) { @@ -74,6 +74,32 @@ aes_dec_last_round_x4 (u8x64 a, u8x64 k) } #endif +#ifdef __VAES__ +static_always_inline u8x32 +aes_enc_round_x2 (u8x32 a, u8x32 k) +{ + return (u8x32) _mm256_aesenc_epi128 ((__m256i) a, (__m256i) k); +} + +static_always_inline u8x32 +aes_enc_last_round_x2 (u8x32 a, u8x32 k) +{ + return (u8x32) _mm256_aesenclast_epi128 ((__m256i) a, (__m256i) k); +} + +static_always_inline u8x32 +aes_dec_round_x2 (u8x32 a, u8x32 k) +{ + return (u8x32) _mm256_aesdec_epi128 ((__m256i) a, (__m256i) k); +} + +static_always_inline u8x32 +aes_dec_last_round_x2 (u8x32 a, u8x32 k) +{ + return (u8x32) _mm256_aesdeclast_epi128 ((__m256i) a, (__m256i) k); +} +#endif + static_always_inline u8x16 aes_enc_last_round (u8x16 a, u8x16 k) { |