diff options
| author |   Damjan Marion <damarion@cisco.com> | 2021-07-14 18:18:08 +0200 |
|---|---|---|
| committer |   Florin Coras <florin.coras@gmail.com> | 2021-07-27 23:40:28 +0000 |
| commit | 24d65a1c5aa18c107ae17115dfb2ea1e5cc05527 (patch) | |
| tree | 215cbb2717554776aef83228b66874e1d15a8120 /src/plugins/dpdk | |
| parent | 37579c3bcd5f7c31bee4d16d97cfc71dea07fb76 (diff) | |
vppinfra: introduce CLIB_CACHE_PREFETCH_BYTES
Type: improvement
Change-Id: Ic07010f11ef303f5213a33b0faf24aaedb62f110
Signed-off-by: Damjan Marion <damarion@cisco.com>
Diffstat (limited to 'src/plugins/dpdk')
| -rw-r--r-- | src/plugins/dpdk/device/init.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/plugins/dpdk/device/init.c b/src/plugins/dpdk/device/init.c index aebbb64dd76..f923da6c09e 100644 --- a/src/plugins/dpdk/device/init.c +++ b/src/plugins/dpdk/device/init.c @@ -1921,8 +1921,6 @@ dpdk_init (vlib_main_t * vm) "Data in cache line 0 is bigger than cache line size"); STATIC_ASSERT (offsetof (frame_queue_trace_t, cacheline0) == 0, "Cache line marker must be 1st element in frame_queue_trace_t"); - STATIC_ASSERT (RTE_CACHE_LINE_SIZE == 1 << CLIB_LOG2_CACHE_LINE_BYTES, - "DPDK RTE CACHE LINE SIZE does not match with 1<<CLIB_LOG2_CACHE_LINE_BYTES"); dpdk_cli_reference (); |