Numa-aware, growable physical memory allocator (pmalloc)

Change-Id: Ic4c46bc733afae8bf0d8146623ed15633928de30
Signed-off-by: Damjan Marion <damarion@cisco.com>

1 files changed, 11 insertions, 24 deletions

diff --git a/src/plugins/ixge/ixge.c b/src/plugins/ixge/ixge.c
index 3c4a5b4bbfc..5dc22bed3a5 100644
--- a/src/plugins/ixge/ixge.c
+++ b/src/plugins/ixge/ixge.c
@@ -2488,13 +2488,11 @@ ixge_dma_init (ixge_device_t * xd, vlib_rx_or_tx_t rt, u32 queue_index)
     round_pow2 (xm->n_descriptors[rt], xm->n_descriptors_per_cache_line);
   dq->head_index = dq->tail_index = 0;
 
-  dq->descriptors =
-    vlib_physmem_alloc_aligned (vm, xm->physmem_region, &error,
-				dq->n_descriptors *
-				sizeof (dq->descriptors[0]),
-				128 /* per chip spec */ );
-  if (error)
-    return error;
+  dq->descriptors = vlib_physmem_alloc_aligned (vm, dq->n_descriptors *
+						sizeof (dq->descriptors[0]),
+						128 /* per chip spec */ );
+  if (!dq->descriptors)
+    return vlib_physmem_last_error (vm);
 
   clib_memset (dq->descriptors, 0,
 	       dq->n_descriptors * sizeof (dq->descriptors[0]));
@@ -2518,10 +2516,10 @@ ixge_dma_init (ixge_device_t * xd, vlib_rx_or_tx_t rt, u32 queue_index)
     {
       u32 i;
 
-      dq->tx.head_index_write_back = vlib_physmem_alloc (vm,
-							 xm->physmem_region,
-							 &error,
-							 CLIB_CACHE_LINE_BYTES);
+      dq->tx.head_index_write_back =
+	vlib_physmem_alloc (vm, CLIB_CACHE_LINE_BYTES);
+      if (!dq->tx.head_index_write_back)
+	return vlib_physmem_last_error (vm);
 
       for (i = 0; i < dq->n_descriptors; i++)
 	dq->descriptors[i].tx = xm->tx_descriptor_template;
@@ -2533,9 +2531,7 @@ ixge_dma_init (ixge_device_t * xd, vlib_rx_or_tx_t rt, u32 queue_index)
     ixge_dma_regs_t *dr = get_dma_regs (xd, rt, queue_index);
     u64 a;
 
-    a =
-      vlib_physmem_virtual_to_physical (vm, xm->physmem_region,
-					dq->descriptors);
+    a = vlib_physmem_get_pa (vm, dq->descriptors);
     dr->descriptor_address[0] = a & 0xFFFFFFFF;
     dr->descriptor_address[1] = a >> (u64) 32;
     dr->n_descriptor_bytes = dq->n_descriptors * sizeof (dq->descriptors[0]);
@@ -2560,8 +2556,7 @@ ixge_dma_init (ixge_device_t * xd, vlib_rx_or_tx_t rt, u32 queue_index)
 	/* Make sure its initialized before hardware can get to it. */
 	dq->tx.head_index_write_back[0] = dq->head_index;
 
-	a = vlib_physmem_virtual_to_physical (vm, xm->physmem_region,
-					      dq->tx.head_index_write_back);
+	a = vlib_physmem_get_pa (vm, dq->tx.head_index_write_back);
 	dr->tx.head_index_write_back_address[0] = /* enable bit */ 1 | a;
 	dr->tx.head_index_write_back_address[1] = (u64) a >> (u64) 32;
       }
@@ -2848,14 +2843,6 @@ ixge_pci_init (vlib_main_t * vm, vlib_pci_dev_handle_t h)
   vlib_pci_addr_t *addr = vlib_pci_get_addr (vm, h);
   vlib_pci_device_info_t *d = vlib_pci_get_device_info (vm, addr, 0);
 
-  /* Allocate physmem region for DMA buffers */
-  if (xm->physmem_region_allocated == 0)
-    {
-      error = vlib_physmem_region_alloc (vm, "ixge decriptors", 2 << 20, 0,
-					 VLIB_PHYSMEM_F_INIT_MHEAP,
-					 &xm->physmem_region);
-      xm->physmem_region_allocated = 1;
-    }
   if (error)
     return error;