diff options
| author |   Damjan Marion <damarion@cisco.com> | 2021-07-15 11:54:41 +0200 |
|---|---|---|
| committer |   Andrew Yourtchenko <ayourtch@gmail.com> | 2021-07-15 11:25:08 +0000 |
| commit | af7fb04b81c765c3e3f621c6b23fc3390310715b (patch) | |
| tree | fec5e2de4dc1ec64026c7339eb898797ce66fba0 /src/plugins/memif/node.c | |
| parent | 0aea808ac5cb1132b9787c8f7d5f9d995cd3413b (diff) | |
misc: replace CLIB_PREFETCH with clib_prefetch_{load,store}
Type: refactor
Change-Id: Id10cbf52e8f2dd809080a228d8fa282308be84ac
Signed-off-by: Damjan Marion <damarion@cisco.com>
Diffstat (limited to 'src/plugins/memif/node.c')
| -rw-r--r-- | src/plugins/memif/node.c | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/src/plugins/memif/node.c b/src/plugins/memif/node.c index a69ab7f7c2c..8bb3758c5fd 100644 --- a/src/plugins/memif/node.c +++ b/src/plugins/memif/node.c @@ -207,8 +207,7 @@ memif_device_input_inline (vlib_main_t *vm, vlib_node_runtime_t *node, dst_off = start_offset; next_slot: - CLIB_PREFETCH (&ring->desc[(cur_slot + 8) & mask], - CLIB_CACHE_LINE_BYTES, LOAD); + clib_prefetch_load (&ring->desc[(cur_slot + 8) & mask]); s0 = cur_slot & mask; d0 = &ring->desc[s0]; n_bytes_left = d0->length; @@ -277,10 +276,10 @@ memif_device_input_inline (vlib_main_t *vm, vlib_node_runtime_t *node, co = ptd->copy_ops; while (n_left >= 8) { - CLIB_PREFETCH (co[4].data, CLIB_CACHE_LINE_BYTES, LOAD); - CLIB_PREFETCH (co[5].data, CLIB_CACHE_LINE_BYTES, LOAD); - CLIB_PREFETCH (co[6].data, CLIB_CACHE_LINE_BYTES, LOAD); - CLIB_PREFETCH (co[7].data, CLIB_CACHE_LINE_BYTES, LOAD); + clib_prefetch_load (co[4].data); + clib_prefetch_load (co[5].data); + clib_prefetch_load (co[6].data); + clib_prefetch_load (co[7].data); b0 = vlib_get_buffer (vm, ptd->buffers[co[0].buffer_vec_index]); b1 = vlib_get_buffer (vm, ptd->buffers[co[1].buffer_vec_index]); @@ -574,8 +573,7 @@ memif_device_input_zc_inline (vlib_main_t *vm, vlib_node_runtime_t *node, bi0 = mq->buffers[s0]; ptd->buffers[n_rx_packets++] = bi0; - CLIB_PREFETCH (&ring->desc[(cur_slot + 8) & mask], - CLIB_CACHE_LINE_BYTES, LOAD); + clib_prefetch_load (&ring->desc[(cur_slot + 8) & mask]); d0 = &ring->desc[s0]; hb = b0 = vlib_get_buffer (vm, bi0); b0->current_data = start_offset; |