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authorZachary Leaf <zachary.leaf@arm.com>2022-05-23 06:23:40 -0500
committerDamjan Marion <dmarion@0xa5.net>2022-07-12 15:29:23 +0000
commitaf82211d33c9e68c95097f74f04169ec40bd960c (patch)
tree9a93765d5fd583de43bb27557d0ac52358e09469 /src/plugins/perfmon/arm/bundle/inst_clock.c
parent268d7be66b8b48a230e06de645e3a8b7de29d93c (diff)
perfmon: add Arm event bundles
Included statistic bundles (all NODE type): - Instructions and CPU cycles, including IPC - Data cache access/refills/% - Data TLB cache access/refills/% - Instruction cache access/refills/% - Instruction TLB cache access/refills/% - Memory/Bus accesses, memory errors - Branch (mis)predictions, architecturally & speculatively executed - Processor frontend/backend stalls (stalled cycles) Type: feature Signed-off-by: Zachary Leaf <zachary.leaf@arm.com> Tested-by: Jieqiang Wang <jieqiang.wang@arm.com> Change-Id: I7ea4a27c8df8fc7222b743a98bdceaff727e4112
Diffstat (limited to 'src/plugins/perfmon/arm/bundle/inst_clock.c')
-rw-r--r--src/plugins/perfmon/arm/bundle/inst_clock.c102
1 files changed, 102 insertions, 0 deletions
diff --git a/src/plugins/perfmon/arm/bundle/inst_clock.c b/src/plugins/perfmon/arm/bundle/inst_clock.c
new file mode 100644
index 00000000000..272e524cffc
--- /dev/null
+++ b/src/plugins/perfmon/arm/bundle/inst_clock.c
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2022 Arm and/or its affiliates.
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <vnet/vnet.h>
+#include <vppinfra/linux/sysfs.h>
+#include <perfmon/perfmon.h>
+#include <perfmon/arm/events.h>
+
+/* as per .events[n] in PERFMON_REGISTER_BUNDLE */
+enum
+{
+ CPU_CYCLES,
+ INST_RETIRED
+};
+
+static u8 *
+format_arm_inst_clock (u8 *s, va_list *args)
+{
+ perfmon_node_stats_t *ns = va_arg (*args, perfmon_node_stats_t *);
+ int row = va_arg (*args, int);
+
+ switch (row)
+ {
+ case 0:
+ s = format (s, "%llu", ns->n_packets);
+ break;
+
+ case 1:
+ s = format (s, "%llu", ns->n_calls);
+ break;
+
+ case 2:
+ s = format (s, "%llu", ns->value[0]); /* Cycles */
+ break;
+
+ case 3:
+ s = format (s, "%llu", ns->value[1]); /* Inst */
+ break;
+
+ case 4:
+ s = format (s, "%.2f",
+ (f64) ns->n_packets / ns->n_calls); /* Packets/Call */
+ break;
+
+ case 5:
+ s = format (s, "%.2f",
+ (f64) ns->value[0] / ns->n_packets); /* Clocks/Packet */
+ break;
+
+ case 6:
+ s =
+ format (s, "%.2f",
+ (f64) ns->value[1] / ns->n_packets); /* Instructions/Packet */
+ break;
+
+ case 7:
+ s = format (s, "%.2f", (f64) ns->value[1] / ns->value[0]); /* IPC */
+ break;
+ }
+ return s;
+}
+
+PERFMON_REGISTER_BUNDLE (arm_inst_clock) = {
+ .name = "inst-and-clock",
+ .description =
+ "CPU cycles, instructions, instructions/packet, cycles/packet and IPC",
+ .source = "arm",
+ .type = PERFMON_BUNDLE_TYPE_NODE,
+ .events[0] = ARMV8_PMUV3_CPU_CYCLES,
+ .events[1] = ARMV8_PMUV3_INST_RETIRED,
+ .n_events = 2,
+ .n_columns = 8,
+ .format_fn = format_arm_inst_clock,
+ .column_headers = PERFMON_STRINGS ("Packets", "Calls", "CPU Cycles", "Inst*",
+ "Pkts/Call", "Cycles/Pkt", "Inst/Pkt",
+ "IPC"),
+ /*
+ * set a bit for every event used in each column
+ * this allows us to disable columns at bundle registration if an
+ * event is not supported
+ */
+ .column_events =
+ PERFMON_COLUMN_EVENTS (0, 0, SET_BIT (CPU_CYCLES), SET_BIT (INST_RETIRED),
+ 0, SET_BIT (CPU_CYCLES), SET_BIT (INST_RETIRED),
+ SET_BIT (CPU_CYCLES) | SET_BIT (INST_RETIRED)),
+ .footer = "* Instructions retired: the counter increments for every "
+ "architecturally executed instruction\n"
+ "- See Armv8-A Architecture Reference Manual, D7.10 PMU events and"
+ " event numbers for full description.\n"
+};