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authorRay Kinsella <mdr@ashroe.eu>2021-09-30 16:02:04 +0100
committerDamjan Marion <dmarion@me.com>2021-10-04 09:14:24 +0000
commitbf37bf6f79a4d6242b35361c04d559c6bd8e6b2e (patch)
tree0e29bc362bfd3604703bfe7a76d49bd5d510e638 /src/plugins/perfmon/intel/core.h
parentd0ea764a5d7370747ca3dbb1288c62ee5ccba67c (diff)
perfmon: topdown events as peusdo events
Topdown events are peusdo events exposed by linux, and are only present on Intel platforms. Change to clarifies this. Type: fix Signed-off-by: Ray Kinsella <mdr@ashroe.eu> Change-Id: I6a3dcea5f43f53dbb96475329baf5e596a24d54f
Diffstat (limited to 'src/plugins/perfmon/intel/core.h')
-rw-r--r--src/plugins/perfmon/intel/core.h22
1 files changed, 13 insertions, 9 deletions
diff --git a/src/plugins/perfmon/intel/core.h b/src/plugins/perfmon/intel/core.h
index 0e29022bfdf..d2960b12401 100644
--- a/src/plugins/perfmon/intel/core.h
+++ b/src/plugins/perfmon/intel/core.h
@@ -22,13 +22,7 @@
/* EventCode, UMask, EdgeDetect, AnyThread, Invert, CounterMask
* counter_unit, name, suffix, description */
-#define foreach_perf_intel_core_event \
- _ (0x00, 0x02, 0, 0, 0, 0x00, CPU_CLK_UNHALTED, THREAD, \
- "Core cycles when the thread is not in halt state") \
- _ (0x00, 0x03, 0, 0, 0, 0x00, CPU_CLK_UNHALTED, REF_TSC, \
- "Reference cycles when the core is not in halt state.") \
- _ (0x00, 0x04, 0, 0, 0, 0x00, TOPDOWN, SLOTS, \
- "TMA slots available for an unhalted logical processor.") \
+#define foreach_perf_intel_peusdo_event \
_ (0x00, 0x80, 0, 0, 0, 0x00, TOPDOWN, L1_RETIRING_METRIC, \
"TMA retiring slots for an unhalted logical processor.") \
_ (0x00, 0x81, 0, 0, 0, 0x00, TOPDOWN, L1_BAD_SPEC_METRIC, \
@@ -36,7 +30,17 @@
_ (0x00, 0x82, 0, 0, 0, 0x00, TOPDOWN, L1_FE_BOUND_METRIC, \
"TMA fe bound slots for an unhalted logical processor.") \
_ (0x00, 0x83, 0, 0, 0, 0x00, TOPDOWN, L1_BE_BOUND_METRIC, \
- "TMA be bound slots for an unhalted logical processor.") \
+ "TMA be bound slots for an unhalted logical processor.")
+
+/* EventCode, UMask, EdgeDetect, AnyThread, Invert, CounterMask
+ * counter_unit, name, suffix, description */
+#define foreach_perf_intel_core_event \
+ _ (0x00, 0x02, 0, 0, 0, 0x00, CPU_CLK_UNHALTED, THREAD, \
+ "Core cycles when the thread is not in halt state") \
+ _ (0x00, 0x03, 0, 0, 0, 0x00, CPU_CLK_UNHALTED, REF_TSC, \
+ "Reference cycles when the core is not in halt state.") \
+ _ (0x00, 0x04, 0, 0, 0, 0x00, TOPDOWN, SLOTS, \
+ "TMA slots available for an unhalted logical processor.") \
_ (0x03, 0x02, 0, 0, 0, 0x00, LD_BLOCKS, STORE_FORWARD, \
"Loads blocked due to overlapping with a preceding store that cannot be" \
" forwarded.") \
@@ -192,7 +196,7 @@ typedef enum
{
#define _(event, umask, edge, any, inv, cmask, name, suffix, desc) \
INTEL_CORE_E_##name##_##suffix,
- foreach_perf_intel_core_event
+ foreach_perf_intel_core_event foreach_perf_intel_peusdo_event
#undef _
INTEL_CORE_N_EVENTS,
} perf_intel_core_event_t;