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authorRay Kinsella <mdr@ashroe.eu>2021-10-06 15:21:33 +0000
committerDamjan Marion <dmarion@me.com>2021-10-07 13:23:06 +0000
commit12ba95bff55362b17acddac0b9063d9109ec0646 (patch)
tree57d0317ba5a25180dab2678e5fc67b9604368e34 /src/plugins/perfmon/intel/core.h
parentce45b161566e2ece499426cbd937086b4b780a0d (diff)
perfmon: Topdown Level 1 support on Snowridge
Enable Topdown Level 1 support on Snowridge, enabled with standard CPU events on small core. Type: improvement Signed-off-by: Ray Kinsella <mdr@ashroe.eu> Change-Id: I58ad09383de7464265ac1b69e683f253591e3b5e
Diffstat (limited to 'src/plugins/perfmon/intel/core.h')
-rw-r--r--src/plugins/perfmon/intel/core.h15
1 files changed, 14 insertions, 1 deletions
diff --git a/src/plugins/perfmon/intel/core.h b/src/plugins/perfmon/intel/core.h
index d2960b12401..944331132f2 100644
--- a/src/plugins/perfmon/intel/core.h
+++ b/src/plugins/perfmon/intel/core.h
@@ -34,6 +34,18 @@
/* EventCode, UMask, EdgeDetect, AnyThread, Invert, CounterMask
* counter_unit, name, suffix, description */
+#define foreach_perf_intel_tremont_event \
+ _ (0xc2, 0x00, 0, 0, 0, 0x00, TOPDOWN, L1_RETIRING_TREMONT, \
+ "TMA retiring slots for an unhalted logical processor.") \
+ _ (0x71, 0x00, 0, 0, 0, 0x00, TOPDOWN, L1_FE_BOUND_TREMONT, \
+ "TMA fe bound slots for an unhalted logical processor.") \
+ _ (0x73, 0x06, 0, 0, 0, 0x00, TOPDOWN, L1_BAD_SPEC_TREMONT, \
+ "TMA bad spec slots or an unhalted logical processor.") \
+ _ (0x74, 0x00, 0, 0, 0, 0x00, TOPDOWN, L1_BE_BOUND_TREMONT, \
+ "TMA be bound slots for an unhalted logical processor.")
+
+/* EventCode, UMask, EdgeDetect, AnyThread, Invert, CounterMask
+ * counter_unit, name, suffix, description */
#define foreach_perf_intel_core_event \
_ (0x00, 0x02, 0, 0, 0, 0x00, CPU_CLK_UNHALTED, THREAD, \
"Core cycles when the thread is not in halt state") \
@@ -197,8 +209,9 @@ typedef enum
#define _(event, umask, edge, any, inv, cmask, name, suffix, desc) \
INTEL_CORE_E_##name##_##suffix,
foreach_perf_intel_core_event foreach_perf_intel_peusdo_event
+ foreach_perf_intel_tremont_event
#undef _
- INTEL_CORE_N_EVENTS,
+ INTEL_CORE_N_EVENTS,
} perf_intel_core_event_t;
#endif