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authorNathan Skrzypczak <nathan.skrzypczak@gmail.com>2019-12-03 15:08:27 +0100
committerDave Wallace <dwallacelf@gmail.com>2019-12-04 18:08:51 +0000
commitc9cb8f6d9c6e1f51dfdf3e9f4ba0c9f38d1ca6d6 (patch)
tree88a0ebd269caeceb3dc1a7df4867d527455269ef /src/plugins/quic/quic.h
parentd9577b4aa3a325e46c09796835d22122bec9e3d0 (diff)
quic: fix stream tx_fifo race condition
Type: fix There is a race condition in when receiving TX from a client application : As egress_emit writes as much data as possible to the stream, if during egress_emit the app writes to the fifo, the data will be directly passed to quicly. Then TX callback happens and triggers a scheduler update telling quilcy the stream has data to send. When the next egress_emit is called and no more data has come, we have nothing to write, we return len = 0 to quicly which breaks an assert if a loss happens later on. Change-Id: I47e00a14dfc9068b5dac7b5c090a89124aea004f Signed-off-by: Nathan Skrzypczak <nathan.skrzypczak@gmail.com>
Diffstat (limited to 'src/plugins/quic/quic.h')
-rw-r--r--src/plugins/quic/quic.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/plugins/quic/quic.h b/src/plugins/quic/quic.h
index dfcb0e6f17a..9433a895a8b 100644
--- a/src/plugins/quic/quic.h
+++ b/src/plugins/quic/quic.h
@@ -69,11 +69,23 @@
#define QUIC_DBG(_lvl, _fmt, _args...)
#endif
+#if CLIB_ASSERT_ENABLE
+#define QUIC_ASSERT(truth) ASSERT (truth)
+#else
+#define QUIC_ASSERT(truth) \
+ do { \
+ if (PREDICT_FALSE (! (truth))) \
+ QUIC_ERR ("ASSERT(%s) failed", # truth); \
+ } while (0)
+#endif
+
#define QUIC_ERR(_fmt, _args...) \
do { \
clib_warning ("QUIC-ERR: " _fmt, ##_args); \
} while (0)
+
+
extern vlib_node_registration_t quic_input_node;
typedef enum
@@ -167,6 +179,7 @@ typedef struct quic_stream_data_
u32 ctx_id;
u32 thread_index;
u32 app_rx_data_len; /**< bytes received, to be read by external app */
+ u32 app_tx_data_len; /**< bytes sent */
} quic_stream_data_t;
typedef struct quic_worker_ctx_