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authorDamjan Marion <damarion@cisco.com>2020-03-16 14:44:10 +0100
committerDamjan Marion <dmarion@me.com>2020-03-16 19:09:39 +0000
commitaaa65a12e424574bd795404df273fa5133f57ddd (patch)
tree0ef8b81dd86bde53390da5bdaa173cfa8cd30a93 /src/plugins/rdma/output.c
parentdc812d9a71f2f5105e4aaba50fd98ea3b0b50a9b (diff)
rdma: optimize tx wqe_init
Type: improvement Change-Id: I7f28a3f03ab1ea8461c52743c61dc23a57965237 Signed-off-by: Damjan Marion <damarion@cisco.com>
Diffstat (limited to 'src/plugins/rdma/output.c')
-rw-r--r--src/plugins/rdma/output.c28
1 files changed, 17 insertions, 11 deletions
diff --git a/src/plugins/rdma/output.c b/src/plugins/rdma/output.c
index 015208c023e..848b6fd9c96 100644
--- a/src/plugins/rdma/output.c
+++ b/src/plugins/rdma/output.c
@@ -23,10 +23,6 @@
#include <vnet/devices/devices.h>
#include <rdma/rdma.h>
-#ifndef MLX5_ETH_L2_INLINE_HEADER_SIZE
-#define MLX5_ETH_L2_INLINE_HEADER_SIZE 18
-#endif
-
#define RDMA_TX_RETRIES 5
#define RDMA_TXQ_DV_DSEG_SZ(txq) (RDMA_MLX5_WQE_DS * RDMA_TXQ_DV_SQ_SZ(txq))
@@ -113,18 +109,28 @@ rdma_mlx5_wqe_init (rdma_mlx5_wqe_t * wqe, const void *tmpl,
vlib_buffer_t * b, const u16 tail)
{
u16 sz = b->current_length;
- u16 inline_sz = clib_min (sz, MLX5_ETH_L2_INLINE_HEADER_SIZE);
+ const void *cur = vlib_buffer_get_current (b);
+ uword addr = pointer_to_uword (cur);
clib_memcpy_fast (wqe, tmpl, RDMA_MLX5_WQE_SZ);
-
- wqe->ctrl.opmod_idx_opcode |= ((u32) htobe16 (tail)) << 8;
/* speculatively copy at least MLX5_ETH_L2_INLINE_HEADER_SIZE (18-bytes) */
- const void *cur = vlib_buffer_get_current (b);
clib_memcpy_fast (wqe->eseg.inline_hdr_start,
cur, MLX5_ETH_L2_INLINE_HEADER_SIZE);
- wqe->eseg.inline_hdr_sz = htobe16 (inline_sz);
- wqe->dseg.byte_count = htobe32 (sz - inline_sz);
- wqe->dseg.addr = htobe64 (pointer_to_uword (cur) + inline_sz);
+
+ wqe->wqe_index_lo = tail;
+ wqe->wqe_index_hi = tail >> 8;
+ if (PREDICT_TRUE (sz >= MLX5_ETH_L2_INLINE_HEADER_SIZE))
+ {
+ /* inline_hdr_sz is set to MLX5_ETH_L2_INLINE_HEADER_SIZE
+ in the template */
+ wqe->dseg.byte_count = htobe32 (sz - MLX5_ETH_L2_INLINE_HEADER_SIZE);
+ wqe->dseg.addr = htobe64 (addr + MLX5_ETH_L2_INLINE_HEADER_SIZE);
+ }
+ else
+ {
+ /* dseg.byte_count and desg.addr are set to 0 in the template */
+ wqe->eseg.inline_hdr_sz = htobe16 (sz);
+ }
}
/*