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| author |   Yu Ping <ping.yu@intel.com> | 2019-12-27 04:04:33 +0800 |
|---|---|---|
| committer |   Florin Coras <florin.coras@gmail.com> | 2019-12-27 17:17:51 +0000 |
| commit | b092b77cf238baf1ebba32cb984e9318ff62ad4d (patch) | |
| tree | b71be2242b95c79f977eb237fbf68ad2e550a33c /src/vcl | |
| parent | a42c6ee973bf8e51a5a41aede803a1984b0aa80b (diff) | |
tcp: Enable TCP timewait port use
Improve host stack CPS test, and it help improve 10x performance
Type: feature
Change-Id: I6af61e0bad7c16ee2d30a1422cc46bb89f1cedb4
Signed-off-by: Yu Ping <ping.yu@intel.com>
Signed-off-by: Yuwei Zhang <yuwei1.zhang@intel.com>
Diffstat (limited to 'src/vcl')
0 files changed, 0 insertions, 0 deletions