diff options
| author |   Damjan Marion <damarion@cisco.com> | 2020-11-13 10:46:32 +0100 |
|---|---|---|
| committer |   Beno�t Ganne <bganne@cisco.com> | 2020-11-13 11:32:56 +0000 |
| commit | 6807b77f24cf95e432ccdffef07d81d4a989beb9 (patch) | |
| tree | 18be5d7cbfeb49be1c25b019fc611456f2b143d1 /src/vlib/buffer.h | |
| parent | b44c77d01dcf9ebf80d7bcab097515ad8135bc05 (diff) | |
vlib: vlib_buffer_t should be always 128 bytes, not 2 cachelines
Fixes issues on systems with 128-byte cacheline.
Type: fix
Change-Id: I33689ffa5ef0a879b4bf93c25d48618dd43daf58
Signed-off-by: Damjan Marion <damarion@cisco.com>
Diffstat (limited to 'src/vlib/buffer.h')
| -rw-r--r-- | src/vlib/buffer.h | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/src/vlib/buffer.h b/src/vlib/buffer.h index 3144888f604..d1a00bb3a45 100644 --- a/src/vlib/buffer.h +++ b/src/vlib/buffer.h @@ -155,8 +155,8 @@ typedef union /** part of buffer metadata which is initialized on alloc ends here. */ STRUCT_MARK (template_end); - /** start of 2nd cache line */ - CLIB_CACHE_LINE_ALIGN_MARK (cacheline1); + /** start of 2nd half (2nd cacheline on systems where cacheline size is 64) */ + CLIB_ALIGN_MARK (second_half, 64); /** Specifies trace buffer handle if VLIB_PACKET_IS_TRACED flag is * set. */ @@ -169,8 +169,8 @@ typedef union /**< More opaque data, see ../vnet/vnet/buffer.h */ u32 opaque2[14]; - /** start of third cache line */ - CLIB_CACHE_LINE_ALIGN_MARK (cacheline2); + /** start of buffer headroom */ + CLIB_ALIGN_MARK (headroom, 64); /** Space for inserting data before buffer start. Packet rewrite string * will be rewritten backwards and may extend back before @@ -191,6 +191,10 @@ typedef union #endif } vlib_buffer_t; +STATIC_ASSERT_SIZEOF (vlib_buffer_t, 128 + VLIB_BUFFER_PRE_DATA_SIZE); +STATIC_ASSERT (VLIB_BUFFER_PRE_DATA_SIZE % CLIB_CACHE_LINE_BYTES == 0, + "VLIB_BUFFER_PRE_DATA_SIZE must be divisible by cache line size"); + #define VLIB_BUFFER_HDR_SIZE (sizeof(vlib_buffer_t) - VLIB_BUFFER_PRE_DATA_SIZE) /** \brief Prefetch buffer metadata. |