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authorDamjan Marion <damarion@cisco.com>2023-10-06 10:59:32 +0200
committerOle Tr�an <otroan@employees.org>2023-10-09 09:58:37 +0000
commit65dc34bb0bdc1045388d2bcd2e93704a97ac6843 (patch)
tree1ef794fd12a994dc9f52c7512db51de3e66174af /src/vlib/buffer.h
parentaa7b88120ad83a29a05522bed4e5aa71524b8aba (diff)
buffers: buffer allocation improvements
- pass buffer pool name trough va - make buffers naturaly aligned - fix calculation of total number of buffers Type: improvement Change-Id: I6aebf249ebd67823b4632ac08905bfa3aa7d1ee5 Signed-off-by: Damjan Marion <damarion@cisco.com>
Diffstat (limited to 'src/vlib/buffer.h')
-rw-r--r--src/vlib/buffer.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/vlib/buffer.h b/src/vlib/buffer.h
index b548adf4be8..2a5af210330 100644
--- a/src/vlib/buffer.h
+++ b/src/vlib/buffer.h
@@ -452,11 +452,12 @@ typedef struct
CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
uword start;
uword size;
- uword log2_page_size;
+ u8 log2_page_size;
u8 index;
- u32 numa_node;
+ u8 numa_node;
u32 physmem_map_index;
u32 data_size;
+ u32 alloc_size;
u32 n_buffers;
u32 n_avail;
u32 *buffers;