vlib: introduce DMA infrastructure

This patch introduces DMA infrastructure into vlib. This is well known
that large amount of memory movements will drain core resource. Nowadays
more and more hardware accelerators were designed out for freeing core
from this burden. Meanwhile some restrictions still remained when
utilizing hardware accelerators, e.g. cross numa throughput will have a
significant drop compared to same node. Normally the number of hardware
accelerator instances will less than cores number, not to mention that
applications number will even beyond the number of cores. Some hardware
may support share virtual address with cores, while others are not.

Here we introduce new DMA infrastructure which can fulfill the
requirements of vpp applications like session and memif and in the
meantime dealing with hardware limitations.

Here is some design backgrounds:

  Backend is the abstract of resource which allocated from DMA device
  and can do some basic operations like configuration, DMA copy and
  result query.

  Config is the abstract of application DMA requirement. Application
  need to request an unique config index from DMA infrastructure. This
  unique config index is associated with backend resource. Two options
  cpu fallback and barrier before last can be specified in config.
  DMA transfer will be performed by CPU when backend is busy if cpu
  fallback option is enabled. DMA transfer callback will be in order
  if barrier before last option is enabled.

  We constructs all the stuffs that DMA transfer request needed into
  DMA batch. It contains the pattern of DMA descriptors and function
  pointers for submission and callback. One DMA transfer request need
  multiple times batch update and one time batch submission.

  DMA backends will assigned to config's workers threads equally. Lock
  will be used for thread-safety if same backends assigned to multiple
  threads. Backend node will check all the pending requests in worker
  thread and do callback with the pointer of DMA batch if transfer
  completed. Application can utilize cookie in DMA batch for selves
  usage.

DMA architecture:

   +----------+   +----------+           +----------+   +----------+
   | Config1  |   | Config2  |           | Config1  |   | Config2  |
   +----------+   +----------+           +----------+   +----------+
        ||             ||                     ||             ||
   +-------------------------+           +-------------------------+
   |  DMA polling thread A   |           |  DMA polling thread B   |
   +-------------------------+           +-------------------------+
               ||                                     ||
           +----------+                          +----------+
           | Backend1 |                          | Backend2 |
           +----------+                          +----------+

Type: feature

Signed-off-by: Marvin Liu <yong.liu@intel.com>
Change-Id: I1725e0c26687985aac29618c9abe4f5e0de08ebf

1 files changed, 70 insertions, 0 deletions

diff --git a/src/vlib/dma/dma.rst b/src/vlib/dma/dma.rst
new file mode 100644
index 00000000000..4048d49b218
--- /dev/null
+++ b/src/vlib/dma/dma.rst
@@ -0,0 +1,70 @@
+.. _dma_plugin:
+
+.. toctree::
+
+DMA plugin
+==========
+
+Overview
+--------
+This plugin utilize platform DMA accelerators like CBDMA/DSA for streaming
+data movement. Modern DMA accelerators has high memory bandwidth and benefit
+cross-numa traffic. Accelerator like DSA has the capability to do IO page
+fault recovery, it will save IOMMU setup for the memory which not pinned.
+
+Terminology & Usage
+-------------------
+
+A ``backend`` is the abstract of resource which inherited from DMA device,
+it support necessary operations for DMA offloading like configuration, DMA
+request and result query.
+
+A ``config`` is the abstract of application DMA capability. Application can
+request a config instance through DMA node. DMA node will check the
+requirements of application and bind suitable backend with it.
+
+Enable DSA work queue:
+----------------------
+
+.. code-block:: console
+  # configure 1 groups, each with one engine
+  accel-config config-engine dsa0/engine0.0 --group-id=0
+
+  # configure 1 queues, putting each in a different group, so each
+  # is backed by a single engine
+  accel-config config-wq dsa0/wq0.0 --group-id=0 --type=user  \
+    --priority=10 --max-batch-size=1024 --mode=dedicated -b 1 -a 0 --name=vpp1
+
+DMA transfer:
+-------------
+
+In this sample, application will request DMA capability which can hold
+a batch contained maximum 256 transfers and each transfer hold maximum 4K bytes
+from DMA node. If config_index value is not negative, mean resource has
+been allocated and DMA engine is ready for serve.
+
+.. code-block:: console
+  void dma_completion_cb (vlib_main_t *vm, vlib_dma_batch_t *b);
+
+  vlib_dma_config_args_t args;
+  args->max_transfers = 256;
+  args->max_transfer_size = 4096;
+  args->cpu_fallback = 1;
+  args->barrier_before_last = 1;
+  args->cb = dma_completion_cb;
+  u32 config_index = vlib_dma_config (vm, &args);
+  if (config_index < 0)
+    return;
+
+  u8 *dst[n_transfers];
+  u8 *src[n_transfers];
+  u32 i = 0, size = 4096;
+
+  vlib_dma_batch_t *b;
+  b = vlib_dma_batch_new (vm, config_index);
+  while (wrk_t->config_index >= 0 && n_transfers) {
+    vlib_dma_batch_add (vm, b, dst[i], src[i], size);
+    n_transfers --;
+    i ++;
+  }
+  vlib_dma_batch_submit (vm, config_index);