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authorBenoît Ganne <bganne@cisco.com>2019-03-01 14:14:10 +0100
committerDamjan Marion <dmarion@me.com>2019-03-26 10:06:57 +0000
commit4af1a7f938207f713c249270ed98a0c12f72cd3f (patch)
tree42c93b22e20228641de844d553819f400676cc5e /src/vlibmemory
parent50d5069a80fd763f4270d61d991febbdfa88aed3 (diff)
Simplify adjacency rewrite code
Using memcpy instead of complex specific copy logic. This simplify the implementation and also improve perf slightly. Also move adjacency data from tail to head of buffer, which improves cache locality (header and data share the same cacheline) Finally, fix VxLAN which used to workaround vnet_rewrite logic. Change-Id: I770ddad9846f7ee505aa99ad417e6a61d5cbbefa Signed-off-by: Benoît Ganne <bganne@cisco.com>
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