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authorDamjan Marion <damarion@cisco.com>2021-07-15 11:54:41 +0200
committerAndrew Yourtchenko <ayourtch@gmail.com>2021-07-15 11:25:08 +0000
commitaf7fb04b81c765c3e3f621c6b23fc3390310715b (patch)
treefec5e2de4dc1ec64026c7339eb898797ce66fba0 /src/vnet/ip/reass
parent0aea808ac5cb1132b9787c8f7d5f9d995cd3413b (diff)
misc: replace CLIB_PREFETCH with clib_prefetch_{load,store}
Type: refactor Change-Id: Id10cbf52e8f2dd809080a228d8fa282308be84ac Signed-off-by: Damjan Marion <damarion@cisco.com>
Diffstat (limited to 'src/vnet/ip/reass')
-rw-r--r--src/vnet/ip/reass/ip4_sv_reass.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/vnet/ip/reass/ip4_sv_reass.c b/src/vnet/ip/reass/ip4_sv_reass.c
index 43390eae2ab..9b3f1b98558 100644
--- a/src/vnet/ip/reass/ip4_sv_reass.c
+++ b/src/vnet/ip/reass/ip4_sv_reass.c
@@ -468,8 +468,8 @@ ip4_sv_reass_inline (vlib_main_t * vm, vlib_node_runtime_t * node,
vlib_prefetch_buffer_header (p2, LOAD);
vlib_prefetch_buffer_header (p3, LOAD);
- CLIB_PREFETCH (p2->data, CLIB_CACHE_LINE_BYTES, LOAD);
- CLIB_PREFETCH (p3->data, CLIB_CACHE_LINE_BYTES, LOAD);
+ clib_prefetch_load (p2->data);
+ clib_prefetch_load (p3->data);
}
ip4_header_t *ip0 =