aboutsummaryrefslogtreecommitdiffstats
path: root/src/vnet/ip
diff options
context:
space:
mode:
authorSirshak Das <sirshak.das@arm.com>2018-10-03 22:53:51 +0000
committerDamjan Marion <dmarion@me.com>2018-10-19 07:10:47 +0000
commit2f6d7bb93c157b874efb79a2d1583a4c368bf89a (patch)
tree05dc2867c598cbb8d711f074b4b0eb62dd464f41 /src/vnet/ip
parentbf3443b0f852f5a4c551d12f926defbd047f2161 (diff)
vppinfra: add atomic macros for __sync builtins
This is first part of addition of atomic macros with only macros for __sync builtins. - Based on earlier patch by Damjan (https://gerrit.fd.io/r/#/c/10729/) Additionally - clib_atomic_release macro added and used in the absence of any memory barrier. - clib_atomic_bool_cmp_and_swap added Change-Id: Ie4e48c1e184a652018d1d0d87c4be80ddd180a3b Original-patch-by: Damjan Marion <damarion@cisco.com> Signed-off-by: Sirshak Das <sirshak.das@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com> Reviewed-by: Steve Capper <steve.capper@arm.com>
Diffstat (limited to 'src/vnet/ip')
-rwxr-xr-xsrc/vnet/ip/ip4_mtrie.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/src/vnet/ip/ip4_mtrie.c b/src/vnet/ip/ip4_mtrie.c
index fbb8a748074..e6425ca703a 100755
--- a/src/vnet/ip/ip4_mtrie.c
+++ b/src/vnet/ip/ip4_mtrie.c
@@ -254,7 +254,7 @@ set_ply_with_more_specific_leaf (ip4_fib_mtrie_t * m,
else if (new_leaf_dst_address_bits >=
ply->dst_address_bits_of_leaves[i])
{
- __sync_val_compare_and_swap (&ply->leaves[i], old_leaf, new_leaf);
+ clib_atomic_cmp_and_swap (&ply->leaves[i], old_leaf, new_leaf);
ASSERT (ply->leaves[i] == new_leaf);
ply->dst_address_bits_of_leaves[i] = new_leaf_dst_address_bits;
ply->n_non_empty_leafs += ip4_fib_mtrie_leaf_is_non_empty (ply, i);
@@ -319,8 +319,8 @@ set_leaf (ip4_fib_mtrie_t * m,
old_ply->dst_address_bits_of_leaves[i] =
a->dst_address_length;
- __sync_val_compare_and_swap (&old_ply->leaves[i], old_leaf,
- new_leaf);
+ clib_atomic_cmp_and_swap (&old_ply->leaves[i], old_leaf,
+ new_leaf);
ASSERT (old_ply->leaves[i] == new_leaf);
old_ply->n_non_empty_leafs +=
@@ -378,8 +378,8 @@ set_leaf (ip4_fib_mtrie_t * m,
/* Refetch since ply_create may move pool. */
old_ply = pool_elt_at_index (ip4_ply_pool, old_ply_index);
- __sync_val_compare_and_swap (&old_ply->leaves[dst_byte], old_leaf,
- new_leaf);
+ clib_atomic_cmp_and_swap (&old_ply->leaves[dst_byte], old_leaf,
+ new_leaf);
ASSERT (old_ply->leaves[dst_byte] == new_leaf);
old_ply->dst_address_bits_of_leaves[dst_byte] = ply_base_len;
@@ -451,8 +451,8 @@ set_root_leaf (ip4_fib_mtrie_t * m,
* the new one */
old_ply->dst_address_bits_of_leaves[slot] =
a->dst_address_length;
- __sync_val_compare_and_swap (&old_ply->leaves[slot],
- old_leaf, new_leaf);
+ clib_atomic_cmp_and_swap (&old_ply->leaves[slot],
+ old_leaf, new_leaf);
ASSERT (old_ply->leaves[slot] == new_leaf);
}
else
@@ -498,8 +498,8 @@ set_root_leaf (ip4_fib_mtrie_t * m,
ply_base_len);
new_ply = get_next_ply_for_leaf (m, new_leaf);
- __sync_val_compare_and_swap (&old_ply->leaves[dst_byte], old_leaf,
- new_leaf);
+ clib_atomic_cmp_and_swap (&old_ply->leaves[dst_byte], old_leaf,
+ new_leaf);
ASSERT (old_ply->leaves[dst_byte] == new_leaf);
old_ply->dst_address_bits_of_leaves[dst_byte] = ply_base_len;
}