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authorNeale Ranns <nranns@cisco.com>2018-09-09 04:41:02 -0400
committerDamjan Marion <dmarion@me.com>2018-09-11 17:24:07 +0000
commiteb1525f1060569cc3dc03aca7696ce05e1401a09 (patch)
treeb9fffe456cf81f250c103535215db00645fe9d0e /src/vnet/l2/l2_fib.h
parentc0a93143412b4be7bba087bf633855aeeaee7c56 (diff)
L2-learn; cache prefetch fix
the header is written (STORE) the data is only read (LOAD) Change-Id: Ia3ac0c81224a0db736c329ed3e2e55b7417f08a0 Signed-off-by: Neale Ranns <nranns@cisco.com>
Diffstat (limited to 'src/vnet/l2/l2_fib.h')
-rw-r--r--src/vnet/l2/l2_fib.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/vnet/l2/l2_fib.h b/src/vnet/l2/l2_fib.h
index 77b5e7b9454..a5050c44bb9 100644
--- a/src/vnet/l2/l2_fib.h
+++ b/src/vnet/l2/l2_fib.h
@@ -363,10 +363,10 @@ static_always_inline void
l2fib_lookup_4 (BVT (clib_bihash) * mac_table,
l2fib_entry_key_t * cached_key,
l2fib_entry_result_t * cached_result,
- u8 * mac0,
- u8 * mac1,
- u8 * mac2,
- u8 * mac3,
+ const u8 * mac0,
+ const u8 * mac1,
+ const u8 * mac2,
+ const u8 * mac3,
u16 bd_index0,
u16 bd_index1,
u16 bd_index2,