aboutsummaryrefslogtreecommitdiffstats
path: root/src/vnet/l2/l2_input_vtr.c
diff options
context:
space:
mode:
authorDamjan Marion <damarion@cisco.com>2021-07-15 11:54:41 +0200
committerAndrew Yourtchenko <ayourtch@gmail.com>2021-07-15 11:25:08 +0000
commitaf7fb04b81c765c3e3f621c6b23fc3390310715b (patch)
treefec5e2de4dc1ec64026c7339eb898797ce66fba0 /src/vnet/l2/l2_input_vtr.c
parent0aea808ac5cb1132b9787c8f7d5f9d995cd3413b (diff)
misc: replace CLIB_PREFETCH with clib_prefetch_{load,store}
Type: refactor Change-Id: Id10cbf52e8f2dd809080a228d8fa282308be84ac Signed-off-by: Damjan Marion <damarion@cisco.com>
Diffstat (limited to 'src/vnet/l2/l2_input_vtr.c')
-rw-r--r--src/vnet/l2/l2_input_vtr.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/vnet/l2/l2_input_vtr.c b/src/vnet/l2/l2_input_vtr.c
index be3e6ba85f4..3c1235bfa32 100644
--- a/src/vnet/l2/l2_input_vtr.c
+++ b/src/vnet/l2/l2_input_vtr.c
@@ -126,8 +126,8 @@ VLIB_NODE_FN (l2_invtr_node) (vlib_main_t * vm,
vlib_prefetch_buffer_header (p4, LOAD);
vlib_prefetch_buffer_header (p5, LOAD);
- CLIB_PREFETCH (p4->data, CLIB_CACHE_LINE_BYTES, STORE);
- CLIB_PREFETCH (p5->data, CLIB_CACHE_LINE_BYTES, STORE);
+ clib_prefetch_store (p4->data);
+ clib_prefetch_store (p5->data);
/*
* Prefetch the input config for the N+1 loop iteration