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| author |   Tianyu Li <tianyu.li@arm.com> | 2021-08-26 10:03:43 +0800 |
|---|---|---|
| committer |   Florin Coras <florin.coras@gmail.com> | 2021-08-30 18:53:14 +0000 |
| commit | 40ba69271b27beca78eb8e4dbc5b13c05100299a (patch) | |
| tree | c45233560427e64cbff14059631771ec004eaa50 /src/vnet/l2/l2_rw.c | |
| parent | 276675e2a3907cf38ac097a070fada82be1c2d5a (diff) | |
session: fix prefetch out of struct bound on Arm
CLIB_PREFETCH (s->tx_fifo, 2 * CLIB_CACHE_LINE_BYTES, LOAD);
sizeof(svm_fifo_t) is 128 bytes
Note on 64B cacheline size Arm machine,
CLIB_CACHE_LINE_BYTES 128
CLIB_CACHE_PREFETCH_BYTES 6
above CLIB_PREFETCH () macro will be expand to
__builtin_prefetch(s->tx_fifo)
__builtin_prefetch(s->tx_fifo + 64)
__builtin_prefetch(s->tx_fifo + 128) << prefetch out of range
__builtin_prefetch(s->tx_fifo + 192) << the same here
Solution:
Change to CLIB_PREFETCH (s->tx_fifo, sizeof (*(s->tx_fifo)), LOAD);
Type: fix
Signed-off-by: Tianyu Li <tianyu.li@arm.com>
Reviewed-by: Lijian Zhang <lijian.zhang@arm.com>
Change-Id: I745cbce3dbe5afcab53c39189d18392f569df5aa
Diffstat (limited to 'src/vnet/l2/l2_rw.c')
0 files changed, 0 insertions, 0 deletions