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authorNeale Ranns <nranns@cisco.com>2017-03-23 06:46:01 -0700
committerDamjan Marion <dmarion.lists@gmail.com>2017-03-29 13:00:52 +0000
commit04a75e3230ab71248fc29a56b9f64bdaee0c17ac (patch)
tree85977ecfdf1c4002451cbbcf075694ae1ba1173c /src/vnet/mpls
parent9a69a6095f67b8979a02f128f44e449889454273 (diff)
Mtrie optimisations
1 - make the default route non-special, i.e. like any other less specific route. Consequently, all buckets have a valid valid index of either a leaf or a ply. Checks for special indeices in the data-path can thus be removed. 2 - since all leaves are now 'real' i.e. they represent a real load-balance object, to tell if a ply slot is 'empty' requeirs chekcing that the prefix length of the leaf occupying the slot is slot than the minium value for that ply. 3 - when removing a leaf find the cover first, then recurse down the ply and replace the old leaf with the cover. This saves us a ply walk. Change-Id: Idd523019e8bb1b6ef527b1f5279a5e24bcf18332 Signed-off-by: Neale Ranns <nranns@cisco.com>
Diffstat (limited to 'src/vnet/mpls')
-rw-r--r--src/vnet/mpls/mpls_output.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/src/vnet/mpls/mpls_output.c b/src/vnet/mpls/mpls_output.c
index 2d8bd0c961f..08018fd1685 100644
--- a/src/vnet/mpls/mpls_output.c
+++ b/src/vnet/mpls/mpls_output.c
@@ -121,10 +121,6 @@ mpls_output_inline (vlib_main_t * vm,
adj_index0 = vnet_buffer (p0)->ip.adj_index[VLIB_TX];
adj_index1 = vnet_buffer (p1)->ip.adj_index[VLIB_TX];
- /* We should never rewrite a pkt using the MISS adjacency */
- ASSERT(adj_index0);
- ASSERT(adj_index1);
-
adj0 = adj_get(adj_index0);
adj1 = adj_get(adj_index1);
hdr0 = vlib_buffer_get_current (p0);
@@ -237,9 +233,6 @@ mpls_output_inline (vlib_main_t * vm,
adj_index0 = vnet_buffer (p0)->ip.adj_index[VLIB_TX];
- /* We should never rewrite a pkt using the MISS adjacency */
- ASSERT(adj_index0);
-
adj0 = adj_get(adj_index0);
hdr0 = vlib_buffer_get_current (p0);
@@ -431,7 +424,6 @@ mpls_adj_incomplete (vlib_main_t * vm,
n_left_to_next -= 1;
adj_index0 = vnet_buffer (p0)->ip.adj_index[VLIB_TX];
- ASSERT(adj_index0);
adj0 = adj_get(adj_index0);