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authorDamjan Marion <damarion@cisco.com>2021-07-15 11:54:41 +0200
committerAndrew Yourtchenko <ayourtch@gmail.com>2021-07-15 11:25:08 +0000
commitaf7fb04b81c765c3e3f621c6b23fc3390310715b (patch)
treefec5e2de4dc1ec64026c7339eb898797ce66fba0 /src/vnet/pipeline.h
parent0aea808ac5cb1132b9787c8f7d5f9d995cd3413b (diff)
misc: replace CLIB_PREFETCH with clib_prefetch_{load,store}
Type: refactor Change-Id: Id10cbf52e8f2dd809080a228d8fa282308be84ac Signed-off-by: Damjan Marion <damarion@cisco.com>
Diffstat (limited to 'src/vnet/pipeline.h')
-rw-r--r--src/vnet/pipeline.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/vnet/pipeline.h b/src/vnet/pipeline.h
index 2ac1a9ac27d..afb3c38ca57 100644
--- a/src/vnet/pipeline.h
+++ b/src/vnet/pipeline.h
@@ -75,7 +75,7 @@ generic_stage0 (vlib_main_t * vm,
vlib_node_runtime_t * node, vlib_buffer_t * b AUX_DATA_ARG)
{
vlib_prefetch_buffer_header (b, STORE);
- CLIB_PREFETCH (b->data, CLIB_CACHE_LINE_BYTES, STORE);
+ clib_prefetch_store (b->data);
}
#if NSTAGES == 2