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authorZhiyong Yang <zhiyong.yang@intel.com>2019-05-29 22:38:19 -0400
committerDamjan Marion <dmarion@me.com>2019-05-30 08:39:45 +0000
commit734d430f37251bc7e71d507983ee640ae1625fbe (patch)
tree0833a428be3061fa44cbdeb18fe6de9d42f8b814 /src/vnet/syslog/syslog_api.c
parentfe5974bd881f52cdc3744710c3d6c20c0a25d4f0 (diff)
mpls: leverage vlib_buffer_advance
Change-Id: I363a4444f4d296f04371acd65c702b1a1ce70913 Signed-off-by: Zhiyong Yang <zhiyong.yang@intel.com>
Diffstat (limited to 'src/vnet/syslog/syslog_api.c')
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