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authorDave Barach <dbarach@cisco.com>2018-05-03 08:26:39 -0400
committerFlorin Coras <florin.coras@gmail.com>2018-05-04 15:15:22 +0000
commiteb987d3a09f669787014b1553f032219522149e1 (patch)
tree8d092c7368cfc2e02fc1869c6ded7410ad734392 /src/vnet/vxlan
parent432bf677c6decadd05e3edfe54c02b1d01b2c64e (diff)
Harmonize vec/pool_get_aligned object sizes and alignment requests
Object sizes must evenly divide alignment requests, or vice versa. Otherwise, only the first object will be aligned as requested. Three choices: add CLIB_CACHE_LINE_ALIGN_MARK(align_me) at the end of structures, manually pad to an even divisor or multiple of the alignment request, or use plain vectors/pools. static assert for enforcement. Change-Id: I41aa6ff1a58267301d32aaf4b9cd24678ac1c147 Signed-off-by: Dave Barach <dbarach@cisco.com>
Diffstat (limited to 'src/vnet/vxlan')
-rw-r--r--src/vnet/vxlan/vxlan.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/vnet/vxlan/vxlan.h b/src/vnet/vxlan/vxlan.h
index 8fb031d4af5..3c74bfd4e8e 100644
--- a/src/vnet/vxlan/vxlan.h
+++ b/src/vnet/vxlan/vxlan.h
@@ -66,6 +66,9 @@ typedef CLIB_PACKED(struct {
}) vxlan6_tunnel_key_t;
typedef struct {
+ /* Required for pool_get_aligned */
+ CLIB_CACHE_LINE_ALIGN_MARK(cacheline0);
+
/* FIB DPO for IP forwarding of VXLAN encap packet */
dpo_id_t next_dpo;