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authorVladislav Grishenko <themiron@yandex-team.ru>2023-04-10 18:02:12 +0500
committerVladislav Grishenko <themiron@mail.ru>2023-09-25 03:11:30 +0500
commit08ba422739c1ae77be84cfd2531f331df17d8628 (patch)
tree47bc22cac545f4568a78ef17123a4c5844f9c090 /src/vnet
parent39528796098973fe9a5411e0f6f94268c3324e94 (diff)
fib: fix mpls label dpo packets prefetching
Four packets are batched after 696e88da9799056036f329676213f3c0c0a1db9c, so prefetch is required for the next 4-7 packets, not for 2-5. Type: fix Signed-off-by: Vladislav Grishenko <themiron@yandex-team.ru> Change-Id: I4ab01e66c3b446caf113a154915473e96ab32198
Diffstat (limited to 'src/vnet')
-rw-r--r--src/vnet/dpo/mpls_label_dpo.c32
1 files changed, 16 insertions, 16 deletions
diff --git a/src/vnet/dpo/mpls_label_dpo.c b/src/vnet/dpo/mpls_label_dpo.c
index 7856f050cb0..898ea9246e4 100644
--- a/src/vnet/dpo/mpls_label_dpo.c
+++ b/src/vnet/dpo/mpls_label_dpo.c
@@ -398,22 +398,22 @@ mpls_label_imposition_inline (vlib_main_t * vm,
/* Prefetch next iteration. */
{
- vlib_buffer_t * p2, * p3, *p4, *p5;
-
- p2 = vlib_get_buffer (vm, from[2]);
- p3 = vlib_get_buffer (vm, from[3]);
- p4 = vlib_get_buffer (vm, from[4]);
- p5 = vlib_get_buffer (vm, from[5]);
-
- vlib_prefetch_buffer_header (p2, STORE);
- vlib_prefetch_buffer_header (p3, STORE);
- vlib_prefetch_buffer_header (p4, STORE);
- vlib_prefetch_buffer_header (p5, STORE);
-
- CLIB_PREFETCH (p2->data, sizeof (hdr0[0]), STORE);
- CLIB_PREFETCH (p3->data, sizeof (hdr0[0]), STORE);
- CLIB_PREFETCH (p4->data, sizeof (hdr0[0]), STORE);
- CLIB_PREFETCH (p5->data, sizeof (hdr0[0]), STORE);
+ vlib_buffer_t *p4, *p5, *p6, *p7;
+
+ p4 = vlib_get_buffer (vm, from[4]);
+ p5 = vlib_get_buffer (vm, from[5]);
+ p6 = vlib_get_buffer (vm, from[6]);
+ p7 = vlib_get_buffer (vm, from[7]);
+
+ vlib_prefetch_buffer_header (p4, STORE);
+ vlib_prefetch_buffer_header (p5, STORE);
+ vlib_prefetch_buffer_header (p6, STORE);
+ vlib_prefetch_buffer_header (p7, STORE);
+
+ CLIB_PREFETCH (p4->data, sizeof (hdr0[0]), STORE);
+ CLIB_PREFETCH (p5->data, sizeof (hdr0[0]), STORE);
+ CLIB_PREFETCH (p6->data, sizeof (hdr0[0]), STORE);
+ CLIB_PREFETCH (p7->data, sizeof (hdr0[0]), STORE);
}
from += 4;