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| author |   Nitin Saxena <nsaxena@marvell.com> | 2019-03-28 14:42:31 +0530 |
|---|---|---|
| committer |   Damjan Marion <dmarion@me.com> | 2019-08-19 10:37:25 +0000 |
| commit | c9122f97398b11f8be0256901a0cbd83dc3b6511 (patch) | |
| tree | 4a5b0eaa9eb58267ef97ce01ce885f00387f6ebf /src/vppinfra/bihash_16_8_32.h | |
| parent | a6659214aa7be7fe9fa04fbdc744affaaa8324ec (diff) | |
vppinfra: Update "show cpu" output for AArch64 chips
- Allow "Microarch model(family)" row to show PASS
revison as either string (like A0, B0) or number (like
1.0, 2.0).
- Fix part number for Marvell CN96XX
Change-Id: Ie01a3960c4e5e481be354dc8bb60f744e5c65737
Signed-off-by: Nitin Saxena <nsaxena@marvell.com>
Diffstat (limited to 'src/vppinfra/bihash_16_8_32.h')
0 files changed, 0 insertions, 0 deletions