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| author |   Damjan Marion <damarion@cisco.com> | 2023-04-17 09:38:11 +0000 |
|---|---|---|
| committer |   Andrew Yourtchenko <ayourtch@gmail.com> | 2023-04-17 10:54:34 +0000 |
| commit | 98f7f0a873514604e2cf0433ea06f1705b023b60 (patch) | |
| tree | 5c364ca0ae6353b5e048290bcfca601f72811c9c /src/vppinfra/cpu.h | |
| parent | b42d27ad4825ae44ff81b83b6170523d8739cb43 (diff) | |
build: add scalar (no-simd) march variant
for testing purposes, disabled by default
Type: improvement
Signed-off-by: Damjan Marion <damarion@cisco.com>
Change-Id: Id616e2b3b21ae0f0b44e2b55ecefd501afacc7f2
Diffstat (limited to 'src/vppinfra/cpu.h')
| -rw-r--r-- | src/vppinfra/cpu.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/vppinfra/cpu.h b/src/vppinfra/cpu.h index a30401ab371..60439e0e3ca 100644 --- a/src/vppinfra/cpu.h +++ b/src/vppinfra/cpu.h @@ -21,6 +21,7 @@ #if defined(__x86_64__) #define foreach_march_variant \ + _ (scalar, "Generic (SIMD disabled)") \ _ (hsw, "Intel Haswell") \ _ (trm, "Intel Tremont") \ _ (skx, "Intel Skylake (server) / Cascade Lake") \ @@ -242,6 +243,12 @@ clib_cpu_supports_aes () } static inline int +clib_cpu_march_priority_scalar () +{ + return 1; +} + +static inline int clib_cpu_march_priority_spr () { if (clib_cpu_supports_enqcmd ()) |