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authorGabriel Ganne <gabriel.ganne@enea.com>2017-12-05 14:26:33 +0100
committerDamjan Marion <dmarion.lists@gmail.com>2017-12-05 18:19:43 +0000
commit73cb0062e30ec09aa38bc98d91cbdfc86a8fb6c0 (patch)
treeeae2d395ed3a37db5183046b9647a432f257ae77 /src/vppinfra/cpu.h
parent2aef64f04ed9a43cd0a2a9a1616069a24c14eef8 (diff)
fill "show cpu" Flag list on aarch64 platforms (VPP-1065)
use getauxval(AT_HWCAP) to get the processor capabilities. The result should be the same as calling cat /proc/cpuinfo | grep Feature | head -n1 All but one (aes) features have a different name. handle aes by adding it an arch prefix, which is skipped during print and a clib_cpu_supports_aes() custom function. Change-Id: If9830bd5a17bac1bd1b5337dacbb0ddbb8ed6b18 Signed-off-by: Gabriel Ganne <gabriel.ganne@enea.com>
Diffstat (limited to 'src/vppinfra/cpu.h')
-rw-r--r--src/vppinfra/cpu.h69
1 files changed, 65 insertions, 4 deletions
diff --git a/src/vppinfra/cpu.h b/src/vppinfra/cpu.h
index 75b01e606f3..6504c7b4e3a 100644
--- a/src/vppinfra/cpu.h
+++ b/src/vppinfra/cpu.h
@@ -67,10 +67,36 @@ _ (sse42, 1, ecx, 20) \
_ (avx, 1, ecx, 28) \
_ (avx2, 7, ebx, 5) \
_ (avx512f, 7, ebx, 16) \
-_ (aes, 1, ecx, 25) \
+_ (x86_aes, 1, ecx, 25) \
_ (sha, 7, ebx, 29) \
_ (invariant_tsc, 0x80000007, edx, 8)
+
+#define foreach_aarch64_flags \
+_ (fp, 0) \
+_ (asimd, 1) \
+_ (evtstrm, 2) \
+_ (aarch64_aes, 3) \
+_ (pmull, 4) \
+_ (sha1, 5) \
+_ (sha2, 6) \
+_ (crc32, 7) \
+_ (atomics, 8) \
+_ (fphp, 9) \
+_ (asimdhp, 10) \
+_ (cpuid, 11) \
+_ (asimdrdm, 12) \
+_ (jscvt, 13) \
+_ (fcma, 14) \
+_ (lrcpc, 15) \
+_ (dcpop, 16) \
+_ (sha3, 17) \
+_ (sm3, 18) \
+_ (sm4, 19) \
+_ (asimddp, 20) \
+_ (sha512, 21) \
+_ (sve, 22)
+
#if defined(__x86_64__)
#include "cpuid.h"
@@ -98,15 +124,50 @@ clib_cpu_supports_ ## flag() \
}
foreach_x86_64_flags
#undef _
-#else
+#else /* __x86_64__ */
#define _(flag, func, reg, bit) \
static inline int clib_cpu_supports_ ## flag() { return 0; }
foreach_x86_64_flags
#undef _
+#endif /* __x86_64__ */
+#if defined(__aarch64__)
+#include <sys/auxv.h>
+#define _(flag, bit) \
+static inline int \
+clib_cpu_supports_ ## flag() \
+{ \
+ unsigned long hwcap = getauxval(AT_HWCAP); \
+ return (hwcap & (1 << bit)); \
+}
+ foreach_aarch64_flags
+#undef _
+#else /* ! __x86_64__ && !__aarch64__ */
+#define _(flag, bit) \
+static inline int clib_cpu_supports_ ## flag() { return 0; }
+ foreach_aarch64_flags
+#undef _
+#endif /* __x86_64__, __aarch64__ */
+/*
+ * aes is the only feature with the same name in both flag lists
+ * handle this by prefixing it with the arch name, and handling it
+ * with the custom function below
+ */
+ static inline int
+clib_cpu_supports_aes ()
+{
+#if defined (__aarch64__)
+ return clib_cpu_supports_x86_aes ();
+#elif defined (__aarch64__)
+ return clib_cpu_supports_aarch64_aes ();
+#else
+ return 0;
#endif
-#endif
- format_function_t format_cpu_uarch;
+}
+
+#endif /* included_clib_cpu_h */
+
+format_function_t format_cpu_uarch;
format_function_t format_cpu_model_name;
format_function_t format_cpu_flags;