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| author |   Zhiyong Yang <zhiyong.yang@intel.com> | 2020-03-27 17:12:35 +0000 |
|---|---|---|
| committer |   Damjan Marion <dmarion@me.com> | 2020-04-22 13:03:44 +0000 |
| commit | 703128816ff8504340dcb512ff05935dab6b2e40 (patch) | |
| tree | b1acbd4f112eb9d269f00f33675419d321c70748 /src/vppinfra/crc32.h | |
| parent | 08d01376de5abf2e93c562ee5e24cf62ce1be3ff (diff) | |
ethernet: put vlib_get_buffers together
The patch brings 0.8 clocks saved per pkt in IPv4 l3fwd case on Skylake.
Type: improvement
Signed-off-by: Zhiyong Yang <zhiyong.yang@intel.com>
Change-Id: Ia8d3a27773bf959433380d7c219602b1e4a8e5bd
Diffstat (limited to 'src/vppinfra/crc32.h')
0 files changed, 0 insertions, 0 deletions