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authorLijian Zhang <Lijian.Zhang@arm.com>2018-09-10 17:13:56 +0800
committerDamjan Marion <dmarion@me.com>2018-10-01 09:28:41 +0000
commit2e2372117d35191a0e6c096c5f989930de6e12b1 (patch)
tree16ba106360c4bda39b78ee02f515cbbb2c284e0f /src/vppinfra/dlmalloc.c
parent88c6e0086b15963b4d1a268e1fe8bbc2bcd9779c (diff)
Support dynamic dual/quad loop selection on aarch64
Currently, there are three variants available on aarch64, qdf24xx, thunderx2t99, and cortex-a72. -DCLIB_N_PREFETCHES is passed to source code to select dual/quad implementation. Besides, different compiler options are applied on these critical functions. gcc-7.3.0 reports ICE(internal compiler error) with -mtune=thunderx2t99, so -mtune=thunderx2t99 is enabled only when gcc version is greater than 7.3.0 Cavium ThunderX2, Impermenter 0x43, Part 0x0af -march=armv8-a+crc+crypto -mtune=thunderx2t99 Qualcomm Centriq 2400, Impermenter 0x51, Part 0xc00 -march=armv8.1-a+crc+crypto -mtune=qdf24xx Cortex-A72, Impermenter 0x41, Part 0xd08 -march=armv8-a+crc+crypto -mtune=cortex-a72 Change-Id: Id5649c6325c1e642d0fd42535e3908793b13e02a Signed-off-by: Lijian Zhang <Lijian.Zhang@arm.com> Reviewed-by: Sirshak Das <sirshak.das@arm.com> Reviewed-by: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
Diffstat (limited to 'src/vppinfra/dlmalloc.c')
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