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authorDamjan Marion <damjan.marion@gmail.com>2020-02-13 18:14:06 +0100
committerDamjan Marion <damjan.marion@gmail.com>2020-02-13 18:17:54 +0100
commitf75defa7676759fa81ae75e7edd492572c6b8fd6 (patch)
treeda5eecdcdec868d14d81db8c59e2d1271899d49b /src/vppinfra/vector_sse42.h
parentadcfb15fa0b08403c5b5b170149f7d3662e65761 (diff)
vppinfra: add 128-bit and 512-bit a ^ b ^ c shortcut
This allows us to combine 2 XOR operations into signle instruction which makes difference in crypto op: - in x86, by using ternary logic instruction - on ARM, by using EOR3 instruction (available with sha3 feature) Type: refactor Change-Id: Ibdf9001840399d2f838d491ca81b57cbd8430433 Signed-off-by: Damjan Marion <damjan.marion@gmail.com>
Diffstat (limited to 'src/vppinfra/vector_sse42.h')
-rw-r--r--src/vppinfra/vector_sse42.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/vppinfra/vector_sse42.h b/src/vppinfra/vector_sse42.h
index c22e86e7437..e75580e6026 100644
--- a/src/vppinfra/vector_sse42.h
+++ b/src/vppinfra/vector_sse42.h
@@ -746,6 +746,15 @@ u8x16_blend (u8x16 v1, u8x16 v2, u8x16 mask)
return (u8x16) _mm_blendv_epi8 ((__m128i) v1, (__m128i) v2, (__m128i) mask);
}
+static_always_inline u8x16
+u8x16_xor3 (u8x16 a, u8x16 b, u8x16 c)
+{
+#if __AVX512F__
+ return (u8x16) _mm_ternarylogic_epi32 ((__m128i) a, (__m128i) b,
+ (__m128i) c, 0x96);
+#endif
+ return a ^ b ^ c;
+}
#endif /* included_vector_sse2_h */