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| author |   Brian Brooks <brian.brooks@arm.com> | 2018-01-09 16:39:07 -0600 |
|---|---|---|
| committer |   Damjan Marion <dmarion.lists@gmail.com> | 2018-01-30 13:23:31 +0000 |
| commit | c0379aec241c78fe07074fa7e63a5009a4e7944a (patch) | |
| tree | 2a217cbdc9b65a89b9b6c68d20b6548d36649c3e /src/vppinfra | |
| parent | bc39e3470c04af56bc45756585b848cd448b990b (diff) | |
Arm system counter cleanup
Add some description and cleanup code that uses Arm system counter.
Change-Id: Ie1fe00e3e4b5d98867617b7b0184ac526e333c53
Signed-off-by: Brian Brooks <brian.brooks@arm.com>
Diffstat (limited to 'src/vppinfra')
| -rw-r--r-- | src/vppinfra/time.c | 15 | ||||
| -rw-r--r-- | src/vppinfra/time.h | 22 |
2 files changed, 19 insertions, 18 deletions
diff --git a/src/vppinfra/time.c b/src/vppinfra/time.c index 770ed8b6807..1626ff4ed38 100644 --- a/src/vppinfra/time.c +++ b/src/vppinfra/time.c @@ -142,17 +142,20 @@ done: f64 os_cpu_clock_frequency (void) { +#if defined (__aarch64__) + /* The system counter increments at a fixed frequency. It is distributed + * to each core which has registers for reading the current counter value + * as well as the clock frequency. The system counter is not clocked at + * the same frequency as the core. */ + u32 hz; + asm volatile ("mrs %0, cntfrq_el0":"=r" (hz)); + return (f64) hz; +#endif f64 cpu_freq; if (clib_cpu_supports_invariant_tsc ()) return estimate_clock_frequency (1e-3); -#if defined (__aarch64__) - u64 tsc; - asm volatile ("mrs %0, CNTFRQ_EL0":"=r" (tsc)); - return (f64) tsc; -#endif - /* First try /sys version. */ cpu_freq = clock_frequency_from_sys_filesystem (); if (cpu_freq != 0) diff --git a/src/vppinfra/time.h b/src/vppinfra/time.h index 288922d8a83..ead4b7d8ea4 100644 --- a/src/vppinfra/time.h +++ b/src/vppinfra/time.h @@ -114,6 +114,16 @@ clib_cpu_time_now (void) return (u64) lo + ((u64) hi2 << (u64) 32); } +#elif defined (__aarch64__) +always_inline u64 +clib_cpu_time_now (void) +{ + u64 vct; + /* User access to cntvct_el0 is enabled in Linux kernel since 3.12. */ + asm volatile ("mrs %0, cntvct_el0":"=r" (vct)); + return vct; +} + #elif defined (__arm__) #if defined(__ARM_ARCH_8A__) always_inline u64 @@ -164,18 +174,6 @@ clib_cpu_time_now (void) return ((u64) h << 32) | l; } -#elif defined (__aarch64__) -always_inline u64 -clib_cpu_time_now (void) -{ - u64 tsc; - - /* Works on Cavium ThunderX. Other platforms: YMMV */ - asm volatile ("mrs %0, cntvct_el0":"=r" (tsc)); - - return tsc; -} - #else #error "don't know how to read CPU time stamp" |