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authorSivaprasad Tummala <sivaprasad.tummala@amd.com>2023-04-17 05:05:15 -0700
committerDamjan Marion <dmarion@0xa5.net>2023-04-18 12:12:05 +0000
commit206592bb731e6668d2b8f2e01479998cc1ec60d5 (patch)
tree934ace4c220c70b3ed942d51c218fffef74a71f8 /src/vppinfra
parentb1c5c3fc344a48eed79dc433ecbeb7bb26433986 (diff)
vppinfra: Multiarch support for AMD EPYC processors
Type: feature - Added multiarch support for AMD Zen architectures Change-Id: I65d3fe94b6cc622ebecbe1ac803efa674e87c87a Signed-off-by: Sivaprasad Tummala <sivaprasad.tummala@amd.com>
Diffstat (limited to 'src/vppinfra')
-rw-r--r--src/vppinfra/cpu.h23
1 files changed, 21 insertions, 2 deletions
diff --git a/src/vppinfra/cpu.h b/src/vppinfra/cpu.h
index 29992bb11eb..017ecb1ca0e 100644
--- a/src/vppinfra/cpu.h
+++ b/src/vppinfra/cpu.h
@@ -27,7 +27,9 @@
_ (skx, "Intel Skylake (server) / Cascade Lake") \
_ (icl, "Intel Ice Lake") \
_ (adl, "Intel Alder Lake") \
- _ (spr, "Intel Sapphire Rapids")
+ _ (spr, "Intel Sapphire Rapids") \
+ _ (znver3, "AMD Milan") \
+ _ (znver4, "AMD Genoa")
#elif defined(__aarch64__)
#define foreach_march_variant \
_ (octeontx2, "Marvell Octeon TX2") \
@@ -147,7 +149,8 @@ _CLIB_MARCH_FN_REGISTRATION(fn)
_ (movdir64b, 7, ecx, 28) \
_ (enqcmd, 7, ecx, 29) \
_ (avx512_fp16, 7, edx, 23) \
- _ (invariant_tsc, 0x80000007, edx, 8)
+ _ (invariant_tsc, 0x80000007, edx, 8) \
+ _ (monitorx, 0x80000001, ecx, 29)
#define foreach_aarch64_flags \
_ (fp, 0) \
@@ -300,6 +303,22 @@ clib_cpu_march_priority_hsw ()
return -1;
}
+static inline int
+clib_cpu_march_priority_znver4 ()
+{
+ if (clib_cpu_supports_avx512_bitalg () && clib_cpu_supports_monitorx ())
+ return 250;
+ return -1;
+}
+
+static inline int
+clib_cpu_march_priority_znver3 ()
+{
+ if (clib_cpu_supports_avx2 () && clib_cpu_supports_monitorx ())
+ return 70;
+ return -1;
+}
+
#define X86_CPU_ARCH_PERF_FUNC 0xA
static inline int