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authorZhiyong Yang <zhiyong.yang@intel.com>2019-06-03 22:58:44 -0400
committerDamjan Marion <dmarion@me.com>2019-06-04 07:36:11 +0000
commitab480d0a7097f09f614f863e2af8b5b965200662 (patch)
treed2ee89ab74a00fe3f161f08aa9c01c1c148f5b36 /src
parent1bcb31102fbbf4a960c70f517b18f697d4fd1132 (diff)
srp: leverage vlib_buffer_get_current
Change-Id: I8e4592734cd8343cd95b32ad8617fed4aec3f590 Signed-off-by: Zhiyong Yang <zhiyong.yang@intel.com>
Diffstat (limited to 'src')
-rw-r--r--src/vnet/srp/node.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/vnet/srp/node.c b/src/vnet/srp/node.c
index a852f61ab4d..35121cc61bf 100644
--- a/src/vnet/srp/node.c
+++ b/src/vnet/srp/node.c
@@ -167,8 +167,8 @@ srp_input (vlib_main_t * vm,
b0 = vlib_get_buffer (vm, bi0);
b1 = vlib_get_buffer (vm, bi1);
- s0 = (void *) (b0->data + b0->current_data);
- s1 = (void *) (b1->data + b1->current_data);
+ s0 = vlib_buffer_get_current (b0);
+ s1 = vlib_buffer_get_current (b1);
/* Data packets are always assigned to side A (outer ring) interface. */
sw_if_index0 = vnet_buffer (b0)->sw_if_index[VLIB_RX];
@@ -229,7 +229,7 @@ srp_input (vlib_main_t * vm,
b0 = vlib_get_buffer (vm, bi0);
- s0 = (void *) (b0->data + b0->current_data);
+ s0 = vlib_buffer_get_current (b0);
/* Data packets are always assigned to side A (outer ring) interface. */
sw_if_index0 = vnet_buffer (b0)->sw_if_index[VLIB_RX];